#define ADC_LEN 6
-uint16_t __xdata adc_output[ADC_LEN];
+/* The DMA engine writes to XDATA in MSB order */
+struct dma_xdata16 {
+ uint8_t high;
+ uint8_t low;
+};
+
+struct dma_xdata16 adc_output[ADC_LEN];
+
+#define DMA_XDATA16(a,n) ((uint16_t) ((a)[n].high << 8) | (uint16_t) (a[n].low))
#define ADDRH(a) (((uint16_t) (a)) >> 8)
#define ADDRL(a) (((uint16_t) (a)))
DMA_CFG0_TMODE_REPEATED_SINGLE |
DMA_CFG0_TRIGGER_ADC_CHALL);
dma_config.cfg1 = (DMA_CFG1_SRCINC_0 |
- DMA_CFG1_DESTINC_2 |
+ DMA_CFG1_DESTINC_1 |
DMA_CFG1_PRIORITY_NORMAL);
dma_config.src_high = ADDRH(&ADCXDATA);
usart_out_byte(b);
}
-uint8_t __xdata num_buffer[10];
+#define NUM_LEN 6
+
+uint8_t __xdata num_buffer[NUM_LEN];
uint8_t __xdata * __xdata num_ptr;
void
usart_out_number(uint16_t v)
{
- num_ptr = num_buffer + 10;
+ num_ptr = num_buffer + NUM_LEN;
*--num_ptr = '\0';
do {
*--num_ptr = '0' + v % 10;
v /= 10;
} while (v);
- usart_out_string(num_ptr);
+ while (num_ptr != num_buffer)
+ *--num_ptr = ' ';
+ usart_out_string(num_buffer);
}
+#define ADC(n) DMA_XDATA16(adc_output,n)
+
main ()
{
P1DIR |= 2;
usart_init();
for (;;) {
adc_run();
- usart_out_string("drogue: ");
- usart_out_number(adc_output[4]);
+ usart_out_string("accel: ");
+ usart_out_number(ADC(0));
+ usart_out_string(" pres: ");
+ usart_out_number(ADC(1));
+ usart_out_string(" temp: ");
+ usart_out_number(ADC(2));
+ usart_out_string(" batt: ");
+ usart_out_number(ADC(3));
+ usart_out_string(" drogue: ");
+ usart_out_number(ADC(4));
usart_out_string(" main: ");
- usart_out_number(adc_output[5]);
+ usart_out_number(ADC(5));
usart_out_string("\r\n");
delay(10);
}