altos/stmf0: Have fast ADC ring buffer code use wrap-around

[fw/altos] / src / stmf0 / ao_adc_fast.c

diff --git a/src/stmf0/ao_adc_fast.c b/src/stmf0/ao_adc_fast.c
index 5885ae4fba748379d22bb2f120f803a4952812d6..26e6691c914c87169d72905dbcdfe06ea393cca1 100644 (file)
--- a/src/stmf0/ao_adc_fast.c
+++ b/src/stmf0/ao_adc_fast.c
@@ -18,32 +18,53 @@
 #include <ao.h>
 #include <ao_adc_fast.h>
 
-static uint8_t                 ao_adc_done;
+uint16_t ao_adc_ring[AO_ADC_RING_SIZE] __attribute__((aligned(4)));
+
+/* Maximum number of samples fetched per _ao_adc_start call */
+#define AO_ADC_RING_CHUNK      (AO_ADC_RING_SIZE >> 1)
+
+uint16_t ao_adc_ring_head, ao_adc_ring_remain;
+uint16_t ao_adc_running;
 
 /*
  * Callback from DMA ISR
  *
- * Mark time in ring, shut down DMA engine
+ * Wakeup any waiting processes, mark the DMA as done, start the ADC
+ * if there's still lots of space in the ring
  */
 static void ao_adc_dma_done(int index)
 {
        (void) index;
-       ao_adc_done = 1;
-       ao_wakeup(&ao_adc_done);
+       ao_adc_ring_head += ao_adc_running;
+       ao_adc_ring_remain += ao_adc_running;
+       if (ao_adc_ring_head == AO_ADC_RING_SIZE)
+               ao_adc_ring_head = 0;
+       ao_adc_running = 0;
+       ao_wakeup(&ao_adc_ring_head);
+       ao_dma_done_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1));
+       _ao_adc_start();
 }
 
-/*
- * Start the ADC sequence using the DMA engine
- */
 void
-ao_adc_read(uint16_t *dest, int len)
+_ao_adc_start(void)
 {
-       ao_adc_done = 0;
+       uint16_t        *buf;
+       uint16_t        count;
+
+       if (ao_adc_running)
+               return;
+       count = _ao_adc_space();
+       if (count == 0)
+               return;
+       if (count > AO_ADC_RING_CHUNK)
+               count = AO_ADC_RING_CHUNK;
+       ao_adc_running = count;
+       buf = ao_adc_ring + ao_adc_ring_head;
        stm_adc.isr = 0;
        ao_dma_set_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1),
                            &stm_adc.dr,
-                           dest,
-                           len,
+                           buf,
+                           count,
                            (0 << STM_DMA_CCR_MEM2MEM) |
                            (STM_DMA_CCR_PL_HIGH << STM_DMA_CCR_PL) |
                            (STM_DMA_CCR_MSIZE_16 << STM_DMA_CCR_MSIZE) |
@@ -56,16 +77,6 @@ ao_adc_read(uint16_t *dest, int len)
        ao_dma_start(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1));
 
        stm_adc.cr |= (1 << STM_ADC_CR_ADSTART);
-       ao_arch_block_interrupts();
-       while (!ao_adc_done)
-               ao_sleep(&ao_adc_done);
-       ao_arch_release_interrupts();
-
-       ao_dma_done_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1));
-
-       stm_adc.cr |= (1 << STM_ADC_CR_ADSTP);
-       while ((stm_adc.cr & (1 << STM_ADC_CR_ADSTP)) != 0)
-               ;
 }
 
 void
@@ -139,7 +150,6 @@ ao_adc_init(void)
 #if AO_NUM_ADC > 8
 #error Need more ADC defines
 #endif
-       stm_adc.chselr = chselr;
 
        /* Set the clock */
        stm_adc.cfgr2 = STM_ADC_CFGR2_CKMODE_PCLK_2 << STM_ADC_CFGR2_CKMODE;
@@ -159,14 +169,16 @@ ao_adc_init(void)
        while ((stm_adc.isr & (1 << STM_ADC_ISR_ADRDY)) == 0)
                ;
 
+       stm_adc.chselr = chselr;
+
        stm_adc.cfgr1 = ((0 << STM_ADC_CFGR1_AWDCH) |
                         (0 << STM_ADC_CFGR1_AWDEN) |
                         (0 << STM_ADC_CFGR1_AWDSGL) |
                         (0 << STM_ADC_CFGR1_DISCEN) |
                         (0 << STM_ADC_CFGR1_AUTOOFF) |
-                        (1 << STM_ADC_CFGR1_WAIT) |
+                        (0 << STM_ADC_CFGR1_WAIT) |
                         (1 << STM_ADC_CFGR1_CONT) |
-                        (0 << STM_ADC_CFGR1_OVRMOD) |
+                        (1 << STM_ADC_CFGR1_OVRMOD) |
                         (STM_ADC_CFGR1_EXTEN_DISABLE << STM_ADC_CFGR1_EXTEN) |
                         (0 << STM_ADC_CFGR1_ALIGN) |
                         (STM_ADC_CFGR1_RES_12 << STM_ADC_CFGR1_RES) |