altos/stm: Force STM stack to start at the top of RAM

[fw/altos] / src / stm / stm32l.h

diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h
index 10a53a477fd7932d654dbbc0d2e34cb3af973814..ff8dddffc2bb1cbb95947f5fb995a917020f0288 100644 (file)
--- a/src/stm/stm32l.h
+++ b/src/stm/stm32l.h
@@ -855,10 +855,7 @@ isr(tim7)
 struct stm_syscfg {
        vuint32_t       memrmp;
        vuint32_t       pmc;
-       vuint32_t       exticr1;
-       vuint32_t       exticr2;
-       vuint32_t       exticr3;
-       vuint32_t       exticr4;
+       vuint32_t       exticr[4];
 };
 
 extern struct stm_syscfg stm_syscfg;
@@ -871,6 +868,34 @@ extern struct stm_syscfg stm_syscfg;
 
 #define STM_SYSCFG_PMC_USB_PU          0
 
+#define STM_SYSCFG_EXTICR_PA           0
+#define STM_SYSCFG_EXTICR_PB           1
+#define STM_SYSCFG_EXTICR_PC           2
+#define STM_SYSCFG_EXTICR_PD           3
+#define STM_SYSCFG_EXTICR_PE           4
+#define STM_SYSCFG_EXTICR_PH           5
+
+static inline void
+stm_exticr_set(struct stm_gpio *gpio, int pin) {
+       uint8_t reg = pin >> 2;
+       uint8_t shift = (pin & 3) << 2;
+       uint8_t val = 0;
+
+       if (gpio == &stm_gpioa)
+               val = STM_SYSCFG_EXTICR_PA;
+       else if (gpio == &stm_gpiob)
+               val = STM_SYSCFG_EXTICR_PB;
+       else if (gpio == &stm_gpioc)
+               val = STM_SYSCFG_EXTICR_PC;
+       else if (gpio == &stm_gpiod)
+               val = STM_SYSCFG_EXTICR_PD;
+       else if (gpio == &stm_gpioe)
+               val = STM_SYSCFG_EXTICR_PE;
+
+       stm_syscfg.exticr[reg] = (stm_syscfg.exticr[reg] & ~(0xf << shift)) | val << shift;
+}
+
+
 struct stm_dma_channel {
        vuint32_t       ccr;
        vuint32_t       cndtr;
@@ -953,8 +978,8 @@ extern struct stm_dma stm_dma;
 #define STM_DMA_CHANNEL_USART2_TX      7
 #define STM_DMA_CHANNEL_I2C2_TX                4
 #define STM_DMA_CHANNEL_I2C2_RX                5
-#define STM_DMA_CHANNEL_I2C1_RX                6
-#define STM_DMA_CHANNEL_I2C1_TX                7
+#define STM_DMA_CHANNEL_I2C1_TX                6
+#define STM_DMA_CHANNEL_I2C1_RX                7
 #define STM_DMA_CHANNEL_TIM2_CH3       1
 #define STM_DMA_CHANNEL_TIM2_UP                2
 #define STM_DMA_CHANNEL_TIM2_CH1       5
@@ -1230,7 +1255,7 @@ extern struct stm_i2c stm_i2c1, stm_i2c2;
 #define  STM_I2C_CR2_FREQ_8_MHZ                8
 #define  STM_I2C_CR2_FREQ_16_MHZ       16
 #define  STM_I2C_CR2_FREQ_32_MHZ       32
-#define  STM_I2C_CR2_FREQ_MASK         0x3f;
+#define  STM_I2C_CR2_FREQ_MASK         0x3f
 
 #define STM_I2C_SR1_SMBALERT   15
 #define STM_I2C_SR1_TIMEOUT    14
@@ -1306,6 +1331,8 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
 #define  STM_TIM234_CR1_CMS_CENTER_3   3
 #define  STM_TIM234_CR1_CMS_MASK       3
 #define STM_TIM234_CR1_DIR     4
+#define  STM_TIM234_CR1_DIR_UP         0
+#define  STM_TIM234_CR1_DIR_DOWN       1
 #define STM_TIM234_CR1_OPM     3
 #define STM_TIM234_CR1_URS     2
 #define STM_TIM234_CR1_UDIS    1
@@ -1352,10 +1379,10 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
 #define  STM_TIM234_SMCR_ETF_MASK              15
 #define STM_TIM234_SMCR_MSM    7
 #define STM_TIM234_SMCR_TS     4
-#define  STM_TIM234_SMCR_TS_TR0                        0
-#define  STM_TIM234_SMCR_TS_TR1                        1
-#define  STM_TIM234_SMCR_TS_TR2                        2
-#define  STM_TIM234_SMCR_TS_TR3                        3
+#define  STM_TIM234_SMCR_TS_ITR0               0
+#define  STM_TIM234_SMCR_TS_ITR1               1
+#define  STM_TIM234_SMCR_TS_ITR2               2
+#define  STM_TIM234_SMCR_TS_ITR3               3
 #define  STM_TIM234_SMCR_TS_TI1F_ED            4
 #define  STM_TIM234_SMCR_TS_TI1FP1             5
 #define  STM_TIM234_SMCR_TS_TI2FP2             6