Switch from GPLv2 to GPLv2+

[fw/altos] / src / stm / stm32l.h

diff --git a/src/stm/stm32l.h b/src/stm/stm32l.h
index ff3f53366904d277e4e4a3fc9a7d07fb048c35c3..463125e25f19ebea5472adbd1c0cab57eaa407ff 100644 (file)
--- a/src/stm/stm32l.h
+++ b/src/stm/stm32l.h
@@ -3,7 +3,8 @@
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -52,7 +53,7 @@ stm_moder_set(struct stm_gpio *gpio, int pin, vuint32_t value) {
                       value << STM_MODER_SHIFT(pin));
 }
        
-static inline vuint32_t
+static inline uint32_t
 stm_moder_get(struct stm_gpio *gpio, int pin) {
        return (gpio->moder >> STM_MODER_SHIFT(pin)) & STM_MODER_MASK;
 }
@@ -69,7 +70,7 @@ stm_otyper_set(struct stm_gpio *gpio, int pin, vuint32_t value) {
                        value << STM_OTYPER_SHIFT(pin));
 }
        
-static inline vuint32_t
+static inline uint32_t
 stm_otyper_get(struct stm_gpio *gpio, int pin) {
        return (gpio->otyper >> STM_OTYPER_SHIFT(pin)) & STM_OTYPER_MASK;
 }
@@ -88,7 +89,7 @@ stm_ospeedr_set(struct stm_gpio *gpio, int pin, vuint32_t value) {
                       value << STM_OSPEEDR_SHIFT(pin));
 }
        
-static inline vuint32_t
+static inline uint32_t
 stm_ospeedr_get(struct stm_gpio *gpio, int pin) {
        return (gpio->ospeedr >> STM_OSPEEDR_SHIFT(pin)) & STM_OSPEEDR_MASK;
 }
@@ -166,6 +167,16 @@ stm_gpio_set(struct stm_gpio *gpio, int pin, uint8_t value) {
        gpio->bsrr = ((uint32_t) (value ^ 1) << (pin + 16)) | ((uint32_t) value << pin);
 }
 
+static inline void
+stm_gpio_set_bits(struct stm_gpio *gpio, uint16_t bits) {
+       gpio->bsrr = bits;
+}
+
+static inline void
+stm_gpio_clr_bits(struct stm_gpio *gpio, uint16_t bits) {
+       gpio->bsrr = ((uint32_t) bits) << 16;
+}
+
 static inline uint8_t
 stm_gpio_get(struct stm_gpio *gpio, int pin) {
        return (gpio->idr >> pin) & 1;
@@ -176,12 +187,27 @@ stm_gpio_get_all(struct stm_gpio *gpio) {
        return gpio->idr;
 }
 
-extern struct stm_gpio stm_gpioa;
-extern struct stm_gpio stm_gpiob;
-extern struct stm_gpio stm_gpioc;
-extern struct stm_gpio stm_gpiod;
-extern struct stm_gpio stm_gpioe;
-extern struct stm_gpio stm_gpioh;
+/*
+ * We can't define these in registers.ld or our fancy
+ * ao_enable_gpio macro will expand into a huge pile of code
+ * as the compiler won't do correct constant folding and
+ * dead-code elimination
+
+ extern struct stm_gpio stm_gpioa;
+ extern struct stm_gpio stm_gpiob;
+ extern struct stm_gpio stm_gpioc;
+ extern struct stm_gpio stm_gpiod;
+ extern struct stm_gpio stm_gpioe;
+ extern struct stm_gpio stm_gpioh;
+
+*/
+
+#define stm_gpioh  (*((struct stm_gpio *) 0x40021400))
+#define stm_gpioe  (*((struct stm_gpio *) 0x40021000))
+#define stm_gpiod  (*((struct stm_gpio *) 0x40020c00))
+#define stm_gpioc  (*((struct stm_gpio *) 0x40020800))
+#define stm_gpiob  (*((struct stm_gpio *) 0x40020400))
+#define stm_gpioa  (*((struct stm_gpio *) 0x40020000))
 
 struct stm_usart {
        vuint32_t       sr;     /* status register */
@@ -1334,10 +1360,13 @@ extern struct stm_spi stm_spi1, stm_spi2, stm_spi3;
 #define STM_SPI_CR2_TXDMAEN    1
 #define STM_SPI_CR2_RXDMAEN    0
 
+#define STM_SPI_SR_FRE         8
 #define STM_SPI_SR_BSY         7
 #define STM_SPI_SR_OVR         6
 #define STM_SPI_SR_MODF                5
 #define STM_SPI_SR_CRCERR      4
+#define STM_SPI_SR_UDR         3
+#define STM_SPI_SR_CHSIDE      2
 #define STM_SPI_SR_TXE         1
 #define STM_SPI_SR_RXNE                0
 
@@ -1492,6 +1521,36 @@ extern struct stm_temp_cal       stm_temp_cal;
 #define stm_temp_cal_cold      25
 #define stm_temp_cal_hot       110
 
+struct stm_dbg_mcu {
+       uint32_t        idcode;
+};
+
+extern struct stm_dbg_mcu      stm_dbg_mcu;
+
+static inline uint16_t
+stm_dev_id(void) {
+       return stm_dbg_mcu.idcode & 0xfff;
+}
+
+struct stm_flash_size {
+       uint16_t        f_size;
+};
+
+extern struct stm_flash_size   stm_flash_size_medium;
+extern struct stm_flash_size   stm_flash_size_large;
+
+/* Returns flash size in bytes */
+extern uint32_t
+stm_flash_size(void);
+
+struct stm_device_id {
+       uint32_t        u_id0;
+       uint32_t        u_id1;
+       uint32_t        u_id2;
+};
+
+extern struct stm_device_id    stm_device_id;
+
 #define STM_NUM_I2C    2
 
 #define STM_I2C_INDEX(channel) ((channel) - 1)
@@ -1730,7 +1789,7 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
 #define  STM_TIM234_CCMR1_OC1M_PWM_MODE_1              6
 #define  STM_TIM234_CCMR1_OC1M_PWM_MODE_2              7
 #define  STM_TIM234_CCMR1_OC1M_MASK                    7
-#define STM_TIM234_CCMR1_OC1PE 11
+#define STM_TIM234_CCMR1_OC1PE 3
 #define STM_TIM234_CCMR1_OC1FE 2
 #define STM_TIM234_CCMR1_CC1S  0
 #define  STM_TIM234_CCMR1_CC1S_OUTPUT                  0
@@ -1770,7 +1829,7 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
 #define  STM_TIM234_CCMR2_OC3M_PWM_MODE_1              6
 #define  STM_TIM234_CCMR2_OC3M_PWM_MODE_2              7
 #define  STM_TIM234_CCMR2_OC3M_MASK                    7
-#define STM_TIM234_CCMR2_OC3PE 11
+#define STM_TIM234_CCMR2_OC3PE 3
 #define STM_TIM234_CCMR2_OC3FE 2
 #define STM_TIM234_CCMR2_CC3S  0
 #define  STM_TIM234_CCMR2_CC3S_OUTPUT                  0