Merge branch 'master' of git://git.gag.com/fw/altos
[fw/altos] / src / stm / stm32l.h
index cb66df6c9bdb440d4e745ba5b34aa0abf7cd752e..3a498a0a06043febab4b3bca22e38e5dc041e019 100644 (file)
@@ -167,7 +167,7 @@ stm_gpio_set(struct stm_gpio *gpio, int pin, uint8_t value) {
 }
 
 static inline uint8_t
-stm_gpio_isset(struct stm_gpio *gpio, int pin) {
+stm_gpio_get(struct stm_gpio *gpio, int pin) {
        return (gpio->idr >> pin) & 1;
 }
 
@@ -281,6 +281,30 @@ extern struct stm_flash    stm_flash;
 #define STM_FLASH_ACR_PRFEN    (1)
 #define STM_FLASH_ACR_LATENCY  (0)
 
+#define STM_FLASH_PECR_OBL_LAUNCH      18
+#define STM_FLASH_PECR_ERRIE           17
+#define STM_FLASH_PECR_EOPIE           16
+#define STM_FLASH_PECR_FPRG            10
+#define STM_FLASH_PECR_ERASE           9
+#define STM_FLASH_PECR_FTDW            8
+#define STM_FLASH_PECR_DATA            4
+#define STM_FLASH_PECR_PROG            3
+#define STM_FLASH_PECR_OPTLOCK         2
+#define STM_FLASH_PECR_PRGLOCK         1
+#define STM_FLASH_PECR_PELOCK          0
+
+#define STM_FLASH_SR_OPTVERR           11
+#define STM_FLASH_SR_SIZERR            10
+#define STM_FLASH_SR_PGAERR            9
+#define STM_FLASH_SR_WRPERR            8
+#define STM_FLASH_SR_READY             3
+#define STM_FLASH_SR_ENDHV             2
+#define STM_FLASH_SR_EOP               1
+#define STM_FLASH_SR_BSY               0
+
+#define STM_FLASH_PEKEYR_PEKEY1        0x89ABCDEF
+#define STM_FLASH_PEKEYR_PEKEY2 0x02030405
+
 struct stm_rcc {
        vuint32_t       cr;
        vuint32_t       icscr;
@@ -1255,7 +1279,7 @@ extern struct stm_i2c stm_i2c1, stm_i2c2;
 #define  STM_I2C_CR2_FREQ_8_MHZ                8
 #define  STM_I2C_CR2_FREQ_16_MHZ       16
 #define  STM_I2C_CR2_FREQ_32_MHZ       32
-#define  STM_I2C_CR2_FREQ_MASK         0x3f;
+#define  STM_I2C_CR2_FREQ_MASK         0x3f
 
 #define STM_I2C_SR1_SMBALERT   15
 #define STM_I2C_SR1_TIMEOUT    14
@@ -1331,6 +1355,8 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
 #define  STM_TIM234_CR1_CMS_CENTER_3   3
 #define  STM_TIM234_CR1_CMS_MASK       3
 #define STM_TIM234_CR1_DIR     4
+#define  STM_TIM234_CR1_DIR_UP         0
+#define  STM_TIM234_CR1_DIR_DOWN       1
 #define STM_TIM234_CR1_OPM     3
 #define STM_TIM234_CR1_URS     2
 #define STM_TIM234_CR1_UDIS    1
@@ -1377,10 +1403,10 @@ extern struct stm_tim234 stm_tim2, stm_tim3, stm_tim4;
 #define  STM_TIM234_SMCR_ETF_MASK              15
 #define STM_TIM234_SMCR_MSM    7
 #define STM_TIM234_SMCR_TS     4
-#define  STM_TIM234_SMCR_TS_TR0                        0
-#define  STM_TIM234_SMCR_TS_TR1                        1
-#define  STM_TIM234_SMCR_TS_TR2                        2
-#define  STM_TIM234_SMCR_TS_TR3                        3
+#define  STM_TIM234_SMCR_TS_ITR0               0
+#define  STM_TIM234_SMCR_TS_ITR1               1
+#define  STM_TIM234_SMCR_TS_ITR2               2
+#define  STM_TIM234_SMCR_TS_ITR3               3
 #define  STM_TIM234_SMCR_TS_TI1F_ED            4
 #define  STM_TIM234_SMCR_TS_TI1FP1             5
 #define  STM_TIM234_SMCR_TS_TI2FP2             6