altos: Wait after configuring boot pin before testing it

[fw/altos] / src / stm / ao_dma_stm.c

diff --git a/src/stm/ao_dma_stm.c b/src/stm/ao_dma_stm.c
index 70b9e48a4aac460e001c8120d074fa197ad80d16..8379a1a533ca0ec5e19321910b1a9975a952f744 100644 (file)
--- a/src/stm/ao_dma_stm.c
+++ b/src/stm/ao_dma_stm.c
@@ -20,13 +20,15 @@
 #define NUM_DMA        7
 
 struct ao_dma_config {
-       uint32_t        isr;
+       void            (*isr)(int index);
 };
 
 uint8_t ao_dma_done[NUM_DMA];
 
 static struct ao_dma_config ao_dma_config[NUM_DMA];
+static uint8_t ao_dma_allocated[NUM_DMA];
 static uint8_t ao_dma_mutex[NUM_DMA];
+static uint8_t ao_dma_active;
 
 static void
 ao_dma_isr(uint8_t index) {
@@ -36,10 +38,12 @@ ao_dma_isr(uint8_t index) {
 
        /* Ack them */
        stm_dma.ifcr = isr;
-       isr >>= STM_DMA_ISR(index);
-       ao_dma_config[index].isr |= isr;
-       ao_dma_done[index] = 1;
-       ao_wakeup(&ao_dma_done[index]);
+       if (ao_dma_config[index].isr)
+               (*ao_dma_config[index].isr)(index);
+       else {
+               ao_dma_done[index] = 1;
+               ao_wakeup(&ao_dma_done[index]);
+       }
 }
 
 void stm_dma1_channel1_isr(void) { ao_dma_isr(STM_DMA_INDEX(1)); }
@@ -57,11 +61,27 @@ ao_dma_set_transfer(uint8_t                 index,
                    uint16_t            count,
                    uint32_t            ccr)
 {
-       ao_mutex_get(&ao_dma_mutex[index]);
+       if (ao_dma_allocated[index]) {
+               if (ao_dma_mutex[index])
+                       ao_panic(AO_PANIC_DMA);
+               ao_dma_mutex[index] = 1;
+       } else
+               ao_mutex_get(&ao_dma_mutex[index]);
+       ao_arch_critical(
+               if (ao_dma_active++ == 0)
+                       stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMA1EN);
+               );
        stm_dma.channel[index].ccr = ccr | (1 << STM_DMA_CCR_TCIE);
        stm_dma.channel[index].cndtr = count;
-       stm_dma.channel[index].cpar = (uint32_t) peripheral;
-       stm_dma.channel[index].cmar = (uint32_t) memory;
+       stm_dma.channel[index].cpar = peripheral;
+       stm_dma.channel[index].cmar = memory;
+       ao_dma_config[index].isr = NULL;
+}
+
+void
+ao_dma_set_isr(uint8_t index, void (*isr)(int))
+{
+       ao_dma_config[index].isr = isr;
 }
 
 void
@@ -75,13 +95,29 @@ void
 ao_dma_done_transfer(uint8_t index)
 {
        stm_dma.channel[index].ccr &= ~(1 << STM_DMA_CCR_EN);
-       ao_mutex_put(&ao_dma_mutex[index]);
+       ao_arch_critical(
+               if (--ao_dma_active == 0)
+                       stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_DMA1EN);
+               );
+       if (ao_dma_allocated[index])
+               ao_dma_mutex[index] = 0;
+       else
+               ao_mutex_put(&ao_dma_mutex[index]);
 }
 
 void
 ao_dma_abort(uint8_t index)
 {
        stm_dma.channel[index].ccr &= ~(1 << STM_DMA_CCR_EN);
+       ao_wakeup(&ao_dma_done[index]);
+}
+
+void
+ao_dma_alloc(uint8_t index)
+{
+       if (ao_dma_allocated[index])
+               ao_panic(AO_PANIC_DMA);
+       ao_dma_allocated[index] = 1;
 }
 
 void
@@ -89,11 +125,11 @@ ao_dma_init(void)
 {
        int     index;
 
-       stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_DMA1EN);
-
        for (index = 0; index < STM_NUM_DMA; index++) {
                stm_nvic_set_enable(STM_ISR_DMA1_CHANNEL1_POS + index);
                stm_nvic_set_priority(STM_ISR_DMA1_CHANNEL1_POS + index, 4);
+               ao_dma_allocated[index] = 0;
+               ao_dma_mutex[index] = 0;
        }
        
 }