Merge branch 'master' of ssh://git.gag.com/scm/git/fw/altos

[fw/altos] / src / stm / ao_arch_funcs.h

diff --git a/src/stm/ao_arch_funcs.h b/src/stm/ao_arch_funcs.h
index d6ab1465c73cd1b9a5f0c46080ba1ef780afd1aa..42f1a2e5d75c5aeb4680dbf12c7c9b0f039e9ebb 100644 (file)
--- a/src/stm/ao_arch_funcs.h
+++ b/src/stm/ao_arch_funcs.h
@@ -23,7 +23,7 @@
 
 /* PCLK is set to 16MHz (HCLK 32MHz, APB prescaler 2) */
 
-#define AO_SPI_SPEED_8MHz      STM_SPI_CR1_BR_PCLK_2   /* This doesn't appear to work */
+#define AO_SPI_SPEED_8MHz      STM_SPI_CR1_BR_PCLK_2
 #define AO_SPI_SPEED_4MHz      STM_SPI_CR1_BR_PCLK_4
 #define AO_SPI_SPEED_2MHz      STM_SPI_CR1_BR_PCLK_8
 #define AO_SPI_SPEED_1MHz      STM_SPI_CR1_BR_PCLK_16
@@ -32,7 +32,7 @@
 #define AO_SPI_SPEED_125kHz    STM_SPI_CR1_BR_PCLK_128
 #define AO_SPI_SPEED_62500Hz   STM_SPI_CR1_BR_PCLK_256
 
-#define AO_SPI_SPEED_FAST      AO_SPI_SPEED_4MHz
+#define AO_SPI_SPEED_FAST      AO_SPI_SPEED_8MHz
 
 /* Companion bus wants something no faster than 200kHz */
 
@@ -64,6 +64,9 @@
 #define AO_SPI_INDEX(id)       ((id) & AO_SPI_INDEX_MASK)
 #define AO_SPI_CONFIG(id)      ((id) & AO_SPI_CONFIG_MASK)
 
+uint8_t
+ao_spi_try_get(uint8_t spi_index, uint32_t speed, uint8_t task_id);
+
 void
 ao_spi_get(uint8_t spi_index, uint32_t speed);
 
@@ -71,11 +74,14 @@ void
 ao_spi_put(uint8_t spi_index);
 
 void
-ao_spi_send(void *block, uint16_t len, uint8_t spi_index);
+ao_spi_send(const void *block, uint16_t len, uint8_t spi_index);
 
 void
 ao_spi_send_fixed(uint8_t value, uint16_t len, uint8_t spi_index);
 
+void
+ao_spi_send_sync(void *block, uint16_t len, uint8_t spi_index);
+
 void
 ao_spi_recv(void *block, uint16_t len, uint8_t spi_index);
 
@@ -87,13 +93,25 @@ extern uint16_t     ao_spi_speed[STM_NUM_SPI];
 void
 ao_spi_init(void);
 
+#define ao_spi_set_cs(reg,mask) ((reg)->bsrr = ((uint32_t) (mask)) << 16)
+#define ao_spi_clr_cs(reg,mask) ((reg)->bsrr = (mask))
+
 #define ao_spi_get_mask(reg,mask,bus, speed) do {              \
                ao_spi_get(bus, speed);                         \
-               (reg)->bsrr = ((uint32_t) mask) << 16;  \
+               ao_spi_set_cs(reg,mask);                        \
        } while (0)
 
+static inline uint8_t
+ao_spi_try_get_mask(struct stm_gpio *reg, uint16_t mask, uint8_t bus, uint32_t speed, uint8_t task_id)
+{
+       if (!ao_spi_try_get(bus, speed, task_id))
+               return 0;
+       ao_spi_set_cs(reg, mask);
+       return 1;
+}
+
 #define ao_spi_put_mask(reg,mask,bus) do {     \
-               (reg)->bsrr = mask;             \
+               ao_spi_clr_cs(reg,mask);        \
                ao_spi_put(bus);                \
        } while (0)
 
@@ -113,6 +131,19 @@ ao_spi_init(void);
                        stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_GPIOEEN); \
        } while (0)
 
+#define ao_disable_port(port) do {                                     \
+               if ((port) == &stm_gpioa)                               \
+                       stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOAEN); \
+               else if ((port) == &stm_gpiob)                          \
+                       stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOBEN); \
+               else if ((port) == &stm_gpioc)                          \
+                       stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOCEN); \
+               else if ((port) == &stm_gpiod)                          \
+                       stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIODEN); \
+               else if ((port) == &stm_gpioe)                          \
+                       stm_rcc.ahbenr &= ~(1 << STM_RCC_AHBENR_GPIOEEN); \
+       } while (0)
+
 
 #define ao_gpio_set(port, bit, pin, v) stm_gpio_set(port, bit, v)
 
@@ -124,9 +155,7 @@ ao_spi_init(void);
                stm_moder_set(port, bit, STM_MODER_OUTPUT);\
        } while (0)
 
-#define ao_enable_input(port,bit,mode) do {                            \
-               ao_enable_port(port);                                   \
-               stm_moder_set(port, bit, STM_MODER_INPUT);              \
+#define ao_gpio_set_mode(port,bit,mode) do {                           \
                if (mode == AO_EXTI_MODE_PULL_UP)                       \
                        stm_pupdr_set(port, bit, STM_PUPDR_PULL_UP);    \
                else if (mode == AO_EXTI_MODE_PULL_DOWN)                \
@@ -134,6 +163,12 @@ ao_spi_init(void);
                else                                                    \
                        stm_pupdr_set(port, bit, STM_PUPDR_NONE);       \
        } while (0)
+       
+#define ao_enable_input(port,bit,mode) do {                            \
+               ao_enable_port(port);                                   \
+               stm_moder_set(port, bit, STM_MODER_INPUT);              \
+               ao_gpio_set_mode(port, bit, mode);                      \
+       } while (0)
 
 #define ao_enable_cs(port,bit) do {                            \
                stm_gpio_set((port), bit, 1);                   \
@@ -210,8 +245,30 @@ ao_i2c_recv(void *block, uint16_t len, uint8_t i2c_index, uint8_t stop);
 void
 ao_i2c_init(void);
 
+/* ao_serial_stm.c */
+struct ao_stm_usart {
+       struct ao_fifo          rx_fifo;
+       struct ao_fifo          tx_fifo;
+       struct stm_usart        *reg;
+       uint8_t                 tx_started;
+};
+
+#if HAS_SERIAL_1
+extern struct ao_stm_usart     ao_stm_usart1;
+#endif
+
+#if HAS_SERIAL_2
+extern struct ao_stm_usart     ao_stm_usart2;
+#endif
+
+#if HAS_SERIAL_3
+extern struct ao_stm_usart     ao_stm_usart3;
+#endif
+
 #define ARM_PUSH32(stack, val) (*(--(stack)) = (val))
 
+typedef uint32_t       ao_arch_irq_t;
+
 static inline uint32_t
 ao_arch_irqsave(void) {
        uint32_t        primask;
@@ -230,6 +287,7 @@ ao_arch_memory_barrier() {
        asm volatile("" ::: "memory");
 }
 
+#if HAS_TASK
 static inline void
 ao_arch_init_stack(struct ao_task *task, void *start)
 {
@@ -288,7 +346,7 @@ static inline void ao_arch_restore_stack(void) {
 
        /* Restore APSR */
        asm("pop {r0}");
-       asm("msr apsr,r0");
+       asm("msr apsr_nczvq,r0");
 
        /* Restore general registers */
        asm("pop {r0-r12,lr}\n");
@@ -297,18 +355,41 @@ static inline void ao_arch_restore_stack(void) {
        asm("bx lr");
 }
 
+#ifndef HAS_SAMPLE_PROFILE
+#define HAS_SAMPLE_PROFILE 0
+#endif
+
+#if !HAS_SAMPLE_PROFILE
+#define HAS_ARCH_START_SCHEDULER       1
+
+static inline void ao_arch_start_scheduler(void) {
+       uint32_t        sp;
+       uint32_t        control;
+
+       asm("mrs %0,msp" : "=&r" (sp));
+       asm("msr psp,%0" : : "r" (sp));
+       asm("mrs %0,control" : "=&r" (control));
+       control |= (1 << 1);
+       asm("msr control,%0" : : "r" (control));
+       asm("isb");
+}
+#endif
+
 #define ao_arch_isr_stack()
 
-#define ao_arch_wait_interrupt() do {                  \
-               asm(".global ao_idle_loc\n\twfi\nao_idle_loc:");        \
-               ao_arch_release_interrupts();                           \
-               ao_arch_block_interrupts();                             \
-       } while (0)
+#endif
 
-#define ao_arch_critical(b) do {                               \
-               ao_arch_block_interrupts();                     \
-               do { b } while (0);                             \
+#define ao_arch_wait_interrupt() do {                          \
+               asm("\twfi\n");                                 \
                ao_arch_release_interrupts();                   \
+               asm(".global ao_idle_loc\nao_idle_loc:");       \
+               ao_arch_block_interrupts();                     \
+       } while (0)
+
+#define ao_arch_critical(b) do {                       \
+               uint32_t __mask = ao_arch_irqsave();    \
+               do { b } while (0);                     \
+               ao_arch_irqrestore(__mask);             \
        } while (0)
 
 #endif /* _AO_ARCH_FUNCS_H_ */