samd21: Add SPI configurations used by TM v4.0

[fw/altos] / src / samd21 / ao_spi_samd21.c

diff --git a/src/samd21/ao_spi_samd21.c b/src/samd21/ao_spi_samd21.c
index f62426497f96cab921d91b59ed57c21a2ac360c2..639ba97fc7fb3416c99a6671a27800ce47e05cfa 100644 (file)
--- a/src/samd21/ao_spi_samd21.c
+++ b/src/samd21/ao_spi_samd21.c
@@ -241,6 +241,11 @@ ao_spi_send(const void *block, uint16_t len, uint16_t spi_index)
        spi_run(block, &spi_dev_null, len, spi_index, true, false);
 }
 
+void
+ao_spi_send_fixed(uint8_t data, uint16_t len, uint16_t spi_index)
+{
+       spi_run(&data, &spi_dev_null, len, spi_index, false, false);
+}
 
 void
 ao_spi_recv(void *block, uint16_t len, uint16_t spi_index)
@@ -272,6 +277,20 @@ ao_spi_disable_pin_config(uint16_t spi_pin_config)
                samd21_port_pmux_clr(&samd21_port_a, 6);        /* MISO */
                break;
 #endif
+#if HAS_SPI_3
+       case AO_SPI_PIN_CONFIG(AO_SPI_3_PA22_PA23_PA20):
+               samd21_port_pmux_clr(&samd21_port_a, 22);       /* MOSI */
+               samd21_port_pmux_clr(&samd21_port_a, 23);       /* SCLK */
+               samd21_port_pmux_clr(&samd21_port_a, 20);       /* MISO */
+               break;
+#endif
+#if HAS_SPI_4
+       case AO_SPI_PIN_CONFIG(AO_SPI_4_PB10_PB11_PA12):
+               samd21_port_pmux_clr(&samd21_port_b, 10);       /* MOSI */
+               samd21_port_pmux_clr(&samd21_port_b, 11);       /* SCLK */
+               samd21_port_pmux_clr(&samd21_port_a, 12);       /* MISO */
+               break;
+#endif
 #if HAS_SPI_5
        case AO_SPI_PIN_CONFIG(AO_SPI_5_PB22_PB23_PB03):
                samd21_port_pmux_clr(&samd21_port_b, 22);       /* MOSI */
@@ -308,6 +327,17 @@ ao_spi_enable_pin_config(uint16_t spi_pin_config)
                samd21_port_pmux_set(&samd21_port_a, 6, SAMD21_PORT_PMUX_FUNC_C);       /* MISO */
                break;
 #endif
+#if HAS_SPI_3
+       case AO_SPI_PIN_CONFIG(AO_SPI_3_PA22_PA23_PA20):
+               ao_enable_output(&samd21_port_a, 22, 1);
+               ao_enable_output(&samd21_port_a, 23, 1);
+               ao_enable_input(&samd21_port_a, 20, AO_MODE_PULL_NONE);
+
+               samd21_port_pmux_set(&samd21_port_a, 22, SAMD21_PORT_PMUX_FUNC_C);      /* MOSI */
+               samd21_port_pmux_set(&samd21_port_a, 23, SAMD21_PORT_PMUX_FUNC_C);      /* SCLK */
+               samd21_port_pmux_set(&samd21_port_a, 20, SAMD21_PORT_PMUX_FUNC_D);      /* MISO */
+               break;
+#endif
 #if HAS_SPI_4
        case AO_SPI_PIN_CONFIG(AO_SPI_4_PB10_PB11_PA12):
                ao_enable_output(&samd21_port_b, 10, 1);