altos: Fixes for GCC 10 (-fno-common is default)

[fw/altos] / src / lpc / lpc.h

diff --git a/src/lpc/lpc.h b/src/lpc/lpc.h
index 40d412d01f90b6fabed6fc57e4aa44e1fc348d4c..1cf35dad2e6846fc35d7cfa45846c4b475d7de88 100644 (file)
--- a/src/lpc/lpc.h
+++ b/src/lpc/lpc.h
@@ -3,7 +3,8 @@
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -98,6 +99,7 @@ struct lpc_ioconf {
 };
 
 extern struct lpc_ioconf lpc_ioconf;
+#define lpc_ioconf (*(struct lpc_ioconf *) 0x40044000)
 
 #define LPC_IOCONF_FUNC                0
 
@@ -485,6 +487,7 @@ struct lpc_scb {
 };
 
 extern struct lpc_scb lpc_scb;
+#define lpc_scb (*(struct lpc_scb *) 0x40048000)
 
 #define LPC_SCB_SYSMEMREMAP_MAP                0
 # define LPC_SCB_SYSMEMREMAP_MAP_BOOT_LOADER   0
@@ -644,6 +647,7 @@ struct lpc_flash {
 };
 
 extern struct lpc_flash lpc_flash;
+#define lpc_flash (*(struct lpc_flash *) 0x4003c000)
 
 struct lpc_gpio_pin {
        vuint32_t       isel;           /* 0x00 */
@@ -661,6 +665,7 @@ struct lpc_gpio_pin {
 };
 
 extern struct lpc_gpio_pin lpc_gpio_pin;
+#define lpc_gpio_pin (*(struct lpc_gpio_pin *) 0x4004c000)
 
 struct lpc_gpio_group0 {
 };
@@ -705,6 +710,7 @@ struct lpc_gpio {
 };
 
 extern struct lpc_gpio lpc_gpio;
+#define lpc_gpio (*(struct lpc_gpio *) 0x50000000)
 
 struct lpc_systick {
        uint8_t         r0000[0x10];    /* 0x0000 */
@@ -716,6 +722,7 @@ struct lpc_systick {
 };
 
 extern struct lpc_systick lpc_systick;
+#define lpc_systick (*(struct lpc_systick *) 0xe000e000)
 
 #define LPC_SYSTICK_CSR_ENABLE         0
 #define LPC_SYSTICK_CSR_TICKINT                1
@@ -754,6 +761,7 @@ struct lpc_usart {
 };
 
 extern struct lpc_usart lpc_usart;
+#define lpc_usart (*(struct lpc_usart *) 0x40008000)
 
 #define LPC_USART_IER_RBRINTEN 0
 #define LPC_USART_IER_THREINTEN        1
@@ -860,9 +868,10 @@ struct lpc_usb {
        vuint32_t       introuting;
        uint32_t        r30;
        vuint32_t       eptoggle;
-} lpc_usb;
+};
 
 extern struct lpc_usb lpc_usb;
+#define lpc_usb (*(struct lpc_usb *) 0x40080000)
 
 #define LPC_USB_DEVCMDSTAT_DEV_ADDR    0
 #define LPC_USB_DEVCMDSTAT_DEV_ADDR_MASK       0x7f
@@ -952,12 +961,14 @@ struct lpc_usb_endpoint {
        vuint32_t               reserved_0c;
        struct lpc_usb_epn      epn[4];
 };
+#define lpc_usb_endpoint       (*(struct lpc_usb_endpoint *) 0x20004700)
 
 /* Assigned in registers.ld to point at the base
  * of USB ram
  */
 
 extern uint8_t lpc_usb_sram[];
+#define lpc_usb_sram           ((uint8_t*) 0x20004000)
 
 #define LPC_USB_EP_ACTIVE              31
 #define LPC_USB_EP_DISABLED            30
@@ -1016,6 +1027,7 @@ struct lpc_nvic {
 };
 
 extern struct lpc_nvic lpc_nvic;
+#define lpc_nvic (*(struct lpc_nvic *) 0xe000e100)
 
 static inline void
 lpc_nvic_set_enable(int irq) {
@@ -1083,6 +1095,7 @@ struct arm_scb {
 };
 
 extern struct arm_scb arm_scb;
+#define arm_scb (*(struct arm_scb *) 0xe000ed00)
 
 struct lpc_ssp {
        vuint32_t       cr0;    /* 0x00 */
@@ -1099,6 +1112,8 @@ struct lpc_ssp {
 };
 
 extern struct lpc_ssp lpc_ssp0, lpc_ssp1;
+#define lpc_ssp0 (*(struct lpc_ssp *) 0x40040000)
+#define lpc_ssp1 (*(struct lpc_ssp *) 0x40058000)
 
 #define LPC_NUM_SPI            2
 
@@ -1173,6 +1188,7 @@ struct lpc_adc {
 };
 
 extern struct lpc_adc lpc_adc;
+#define lpc_adc (*(struct lpc_adc *) 0x4001c000)
 
 #define LPC_ADC_CR_SEL         0
 #define LPC_ADC_CR_CLKDIV      8
@@ -1225,7 +1241,6 @@ struct lpc_ct16b {
 };
 
 extern struct lpc_ct16b        lpc_ct16b0, lpc_ct16b1;
-
 #define lpc_ct16b0     (*(struct lpc_ct16b *) 0x4000c000)
 #define lpc_ct16b1     (*(struct lpc_ct16b *) 0x40010000)
 
@@ -1325,6 +1340,8 @@ struct lpc_ct32b {
 };
 
 extern struct lpc_ct32b lpc_ct32b0, lpc_ct32b1;
+#define lpc_ct32b0 (*(struct lpc_ct32b *) 0x40014000)
+#define lpc_ct32b1 (*(struct lpc_ct32b *) 0x40018000)
 
 #define LPC_CT32B_TCR_CEN      0
 #define LPC_CT32B_TCR_CRST     1
@@ -1346,4 +1363,50 @@ extern struct lpc_ct32b lpc_ct32b0, lpc_ct32b1;
 #define LPC_CT32B_EMR_EMC_SET          2
 #define LPC_CT32B_EMR_EMC_TOGGLE       3
 
+#define isr_decl(name) \
+       void lpc_ ## name ## _isr(void)
+
+isr_decl(halt);
+isr_decl(ignore);
+
+isr_decl(nmi);
+isr_decl(hardfault);
+isr_decl(memmanage);
+isr_decl(busfault);
+isr_decl(usagefault);
+isr_decl(svc);
+isr_decl(debugmon);
+isr_decl(pendsv);
+isr_decl(systick);
+
+isr_decl(pin_int0);    /* IRQ0 */
+isr_decl(pin_int1);
+isr_decl(pin_int2);
+isr_decl(pin_int3);
+isr_decl(pin_int4);    /* IRQ4 */
+isr_decl(pin_int5);
+isr_decl(pin_int6);
+isr_decl(pin_int7);
+
+isr_decl(gint0);       /* IRQ8 */
+isr_decl(gint1);
+isr_decl(ssp1);
+isr_decl(i2c);
+
+isr_decl(ct16b0);      /* IRQ16 */
+isr_decl(ct16b1);
+isr_decl(ct32b0);
+isr_decl(ct32b1);
+isr_decl(ssp0);        /* IRQ20 */
+isr_decl(usart);
+isr_decl(usb_irq);
+isr_decl(usb_fiq);
+
+isr_decl(adc); /* IRQ24 */
+isr_decl(wwdt);
+isr_decl(bod);
+isr_decl(flash);
+
+isr_decl(usb_wakeup);
+
 #endif /* _LPC_H_ */