altos/lpc: Make ADC inputs work
[fw/altos] / src / lpc / ao_arch_funcs.h
index 39222b9dab69f42a5f0ed0f3bf26177b54f2a72d..179b2f4d0ae3963dba54febef71ab8889f058004 100644 (file)
@@ -25,7 +25,7 @@
 
 #define lpc_all_bit(port,bit)  (((port) << 5) | (bit))
 
-#define ao_gpio_set(port, bit, pin, v) (lpc_gpio.byte[lpc_all_bit(port,bit)] = v)
+#define ao_gpio_set(port, bit, pin, v) (lpc_gpio.byte[lpc_all_bit(port,bit)] = (v))
 
 #define ao_gpio_get(port, bit, pin)    (lpc_gpio_byte[lpc_all_bit(port,bit)])
 
        } while (0)
 
 #define ao_enable_input(port,bit,mode) do {                            \
+               vuint32_t *_ioconf = &lpc_ioconf.pio0_0 + ((port)*24+(bit)); \
+               vuint32_t _mode;                                        \
                ao_enable_port(port);                                   \
                lpc_gpio.dir[port] &= ~(1 << bit);                      \
                if (mode == AO_EXTI_MODE_PULL_UP)                       \
-                       stm_pupdr_set(port, bit, STM_PUPDR_PULL_UP);    \
+                       _mode = LPC_IOCONF_MODE_PULL_UP << LPC_IOCONF_MODE; \
                else if (mode == AO_EXTI_MODE_PULL_DOWN)                \
-                       stm_pupdr_set(port, bit, STM_PUPDR_PULL_DOWN);  \
+                       _mode = LPC_IOCONF_MODE_PULL_UP << LPC_IOCONF_MODE; \
                else                                                    \
-                       stm_pupdr_set(port, bit, STM_PUPDR_NONE);       \
+                       _mode = LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE; \
+               *_ioconf = ((*_ioconf & ~(LPC_IOCONF_MODE_MASK << LPC_IOCONF_MODE)) | \
+                           _mode |                                     \
+                           (1 << LPC_IOCONF_ADMODE));                  \
        } while (0)
 
+#define lpc_token_paster_2(x,y)                x ## y
+#define lpc_token_evaluator_2(x,y)     lpc_token_paster_2(x,y)
+#define lpc_token_paster_3(x,y,z)      x ## y ## z
+#define lpc_token_evaluator_3(x,y,z)   lpc_token_paster_3(x,y,z)
+#define lpc_token_paster_4(w,x,y,z)    w ## x ## y ## z
+#define lpc_token_evaluator_4(w,x,y,z) lpc_token_paster_4(w,x,y,z)
+#define analog_reg(port,bit)           lpc_token_evaluator_4(pio,port,_,bit)
+#define analog_func(id)                        lpc_token_evaluator_2(LPC_IOCONF_FUNC_AD,id)
+
+#define ao_enable_analog(port,bit,id) do {                             \
+               uint32_t _mode;                                         \
+               ao_enable_port(port);                                   \
+               lpc_gpio.dir[port] &= ~(1 << bit);                      \
+               _mode = ((analog_func(id) << LPC_IOCONF_FUNC) |         \
+                        (0 << LPC_IOCONF_ADMODE));                     \
+               lpc_ioconf.analog_reg(port,bit) = _mode;                \
+       } while (0)
+       
 #define ARM_PUSH32(stack, val) (*(--(stack)) = (val))
 
 static inline uint32_t
@@ -124,7 +147,7 @@ static inline void ao_arch_restore_stack(void) {
 
        /* Restore APSR */
        asm("pop {r0}");
-       asm("msr apsr,r0");
+       asm("msr apsr_nczvq,r0");
 
        /* Restore general registers and return */
        asm("pop {r0-r7,pc}\n");
@@ -144,4 +167,68 @@ static inline void ao_arch_restore_stack(void) {
                ao_arch_release_interrupts();                   \
        } while (0)
 
+/*
+ * SPI
+ */
+
+#define ao_spi_set_cs(port,mask) (lpc_gpio.clr[port] = (mask))
+#define ao_spi_clr_cs(port,mask) (lpc_gpio.set[port] = (mask))
+
+#define ao_spi_get_mask(port,mask,bus,speed) do {      \
+               ao_spi_get(bus, speed);                 \
+               ao_spi_set_cs(port, mask);              \
+       } while (0)
+
+#define ao_spi_put_mask(reg,mask,bus) do {     \
+               ao_spi_clr_cs(reg,mask);        \
+               ao_spi_put(bus);                \
+       } while (0)
+
+#define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
+#define ao_spi_put_bit(reg,bit,pin,bus) ao_spi_put_mask(reg,(1<<bit),bus)
+
+void
+ao_spi_get(uint8_t spi_index, uint32_t speed);
+
+void
+ao_spi_put(uint8_t spi_index);
+
+void
+ao_spi_send(void *block, uint16_t len, uint8_t spi_index);
+
+void
+ao_spi_send_fixed(uint8_t value, uint16_t len, uint8_t spi_index);
+
+void
+ao_spi_recv(void *block, uint16_t len, uint8_t spi_index);
+
+void
+ao_spi_duplex(void *out, void *in, uint16_t len, uint8_t spi_index);
+
+extern uint16_t        ao_spi_speed[LPC_NUM_SPI];
+
+void
+ao_spi_init(void);
+
+#define ao_spi_init_cs(port, mask) do {                                        \
+               uint8_t __bit__;                                        \
+               for (__bit__ = 0; __bit__ < 32; __bit__++) {            \
+                       if (mask & (1 << __bit__))                      \
+                               ao_enable_output(port, __bit__, PIN, 1); \
+               }                                                       \
+       } while (0)
+
+#define HAS_ARCH_START_SCHEDULER       1
+
+static inline void ao_arch_start_scheduler(void) {
+       uint32_t        sp;
+       uint32_t        control;
+
+       asm("mrs %0,msp" : "=&r" (sp));
+       asm("msr psp,%0" : : "r" (sp));
+       asm("mrs %0,control" : "=&r" (control));
+       control |= (1 << 1);
+       asm("msr control,%0" : : "r" (control));
+}
+
 #endif /* _AO_ARCH_FUNCS_H_ */