#include <ao.h>
#include <ao_cc1120.h>
#include <ao_exti.h>
+#include <ao_fec.h>
+#include <ao_packet.h>
uint8_t ao_radio_wake;
uint8_t ao_radio_mutex;
#define CC1120_DEBUG 1
#define CC1120_TRACE 0
+#if CC1120_TRACE
+#define fec_dump_bytes(b,l,n) ao_fec_dump_bytes(b,l,n)
+#else
+#define fec_dump_bytes(b,l,n)
+#endif
+
uint32_t ao_radio_cal = 0x6ca333;
#define FOSC 32000000
ao_radio_deselect();
}
+static void
+ao_radio_burst_read_start (uint16_t addr)
+{
+ uint8_t data[2];
+ uint8_t d;
+
+ if (CC1120_IS_EXTENDED(addr)) {
+ data[0] = ((1 << CC1120_READ) |
+ (1 << CC1120_BURST) |
+ CC1120_EXTENDED);
+ data[1] = addr;
+ d = 2;
+ } else {
+ data[0] = ((1 << CC1120_READ) |
+ (1 << CC1120_BURST) |
+ addr);
+ d = 1;
+ }
+ ao_radio_select();
+ ao_radio_spi_send(data, d);
+}
+
+static void
+ao_radio_burst_read_stop (void)
+{
+ ao_radio_deselect();
+}
+
+
static uint8_t
ao_radio_strobe(uint8_t addr)
{
return ao_radio_marc_status() == CC1120_MARC_STATUS1_RX_FINISHED;
}
+static void
+ao_radio_tx_isr(void)
+{
+ ao_exti_disable(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
+ ao_radio_wake = 1;
+ ao_wakeup(&ao_radio_wake);
+}
+
+static void
+ao_radio_start_tx(void)
+{
+ ao_radio_reg_write(CC1120_IOCFG2, CC1120_IOCFG_GPIO_CFG_RX0TX1_CFG);
+ ao_exti_set_callback(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN, ao_radio_tx_isr);
+ ao_exti_enable(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
+ ao_radio_strobe(CC1120_STX);
+}
+
void
ao_radio_rdf(uint8_t len)
{
int i;
ao_radio_get(len);
- ao_radio_abort = 0;
ao_radio_wake = 0;
for (i = 0; i < sizeof (rdf_setup) / sizeof (rdf_setup[0]); i += 2)
ao_radio_reg_write(rdf_setup[i], rdf_setup[i+1]);
- ao_radio_reg_write(CC1120_IOCFG2, CC1120_IOCFG_GPIO_CFG_RX0TX1_CFG);
-
ao_radio_fifo_write_fixed(ao_radio_rdf_value, len);
- ao_radio_reg_write(CC1120_PKT_LEN, len);
-
- ao_exti_enable(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
-
- ao_radio_strobe(CC1120_STX);
+ ao_radio_start_tx();
cli();
while (!ao_radio_wake && !ao_radio_abort)
void
ao_radio_send(void *d, uint8_t size)
{
- uint8_t marc_status;
+ uint8_t marc_status;
+ uint8_t encode[size + AO_FEC_PREPARE_EXTRA];
+ uint8_t encode_len;
+
+ encode_len = ao_fec_encode(d, size, encode);
+
+ ao_radio_get(encode_len);
+ ao_radio_fifo_write(encode, encode_len);
- ao_radio_get(size);
ao_radio_wake = 0;
- ao_radio_fifo_write(d, size);
- ao_exti_enable(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
- ao_radio_strobe(CC1120_STX);
+
+ ao_radio_start_tx();
+
cli();
- for (;;) {
- if (ao_radio_wake) {
- marc_status = ao_radio_marc_status();
- if (marc_status != CC1120_MARC_STATUS1_NO_FAILURE)
- break;
- ao_radio_wake = 0;
- }
+ while (!ao_radio_wake && !ao_radio_abort)
ao_sleep(&ao_radio_wake);
- }
sei();
+ if (!ao_radio_tx_done())
+ ao_radio_idle();
ao_radio_put();
}
+#define AO_RADIO_MAX_RECV 90
+
+static uint8_t rx_data[2048];
+static uint16_t rx_data_count;
+static uint16_t rx_data_cur;
+static uint8_t rx_ignore;
+
+static void
+ao_radio_rx_isr(void)
+{
+ if (rx_ignore == 0) {
+ rx_data[rx_data_cur++] = stm_spi2.dr;
+ if (rx_data_cur >= rx_data_count) {
+ ao_exti_disable(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
+ ao_radio_wake = 1;
+ ao_wakeup(&ao_radio_wake);
+ }
+ } else {
+ (void) stm_spi2.dr;
+ --rx_ignore;
+ }
+ stm_spi2.dr = 0x00;
+}
+
uint8_t
ao_radio_recv(__xdata void *d, uint8_t size)
{
- uint8_t marc_status = CC1120_MARC_STATUS1_NO_FAILURE;
+ uint8_t len;
+ uint16_t i;
+ uint8_t rssi;
+
+ size -= 2; /* status bytes */
+ len = size + 2; /* CRC bytes */
+ len += 1 + ~(len & 1); /* 1 or two pad bytes */
+ len *= 2; /* 1/2 rate convolution */
+ rx_data_count = len * 8; /* bytes to bits */
+ rx_data_cur = 0;
+ rx_ignore = 2;
+
+ printf ("len %d rx_data_count %d\n", len, rx_data_count);
/* configure interrupt pin */
- ao_radio_get(size);
+ ao_radio_get(len);
ao_radio_wake = 0;
+ ao_radio_abort = 0;
+
+ ao_radio_reg_write(CC1120_PKT_CFG2,
+ (CC1120_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1120_PKT_CFG2_CCA_MODE) |
+ (CC1120_PKT_CFG2_PKT_FORMAT_SYNCHRONOUS_SERIAL << CC1120_PKT_CFG2_PKT_FORMAT));
+
+ ao_radio_reg_write(CC1120_EXT_CTRL, 0);
+
+ ao_radio_reg_write(CC1120_IOCFG2, CC1120_IOCFG_GPIO_CFG_CLKEN_SOFT);
+
+ stm_spi2.cr2 = 0;
+
+ /* clear any RXNE */
+ (void) stm_spi2.dr;
+
+ ao_exti_set_callback(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN, ao_radio_rx_isr);
ao_exti_enable(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
+
ao_radio_strobe(CC1120_SRX);
+
+ ao_radio_burst_read_start(CC1120_SOFT_RX_DATA_OUT);
cli();
- for (;;) {
- if (ao_radio_abort)
- break;
- if (ao_radio_wake) {
- marc_status = ao_radio_marc_status();
- if (marc_status != CC1120_MARC_STATUS1_NO_FAILURE)
- break;
- ao_radio_wake = 0;
- }
+ while (!ao_radio_wake && !ao_radio_abort)
ao_sleep(&ao_radio_wake);
- }
sei();
- if (marc_status != CC1120_MARC_STATUS1_RX_FINISHED)
- ao_radio_fifo_read(d, size);
+ ao_radio_burst_read_stop();
+
+ /* Convert from 'real' rssi to cc1111-style values */
+
+ rssi = (((int8_t) ao_radio_reg_read(CC1120_RSSI1)) + 74) * 2;
+
+ ao_radio_strobe(CC1120_SIDLE);
+
ao_radio_put();
- return marc_status == CC1120_MARC_STATUS1_RX_FINISHED;
+
+ /* Construct final packet */
+
+ ao_fec_decode(rx_data, rx_data_cur, d, size + 2);
+
+ if (ao_fec_check_crc(d, size))
+ ((uint8_t *) d)[size + 1] = 0x80;
+ else
+ ((uint8_t *) d)[size + 1] = 0x00;
+
+ ((uint8_t *) d)[size] = (uint8_t) rssi;
+
+ return 1;
}
/*
CC1120_DRATE0, ((PACKET_DRATE_M >> 0) & 0xff),
CC1120_PKT_CFG2, ((CC1120_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1120_PKT_CFG2_CCA_MODE) |
(CC1120_PKT_CFG2_PKT_FORMAT_NORMAL << CC1120_PKT_CFG2_PKT_FORMAT)),
- CC1120_PKT_CFG1, ((1 << CC1120_PKT_CFG1_WHITE_DATA) |
+ CC1120_PKT_CFG1, ((0 << CC1120_PKT_CFG1_WHITE_DATA) |
(CC1120_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1120_PKT_CFG1_ADDR_CHECK_CFG) |
(CC1120_PKT_CFG1_CRC_CFG_DISABLED << CC1120_PKT_CFG1_CRC_CFG) |
(1 << CC1120_PKT_CFG1_APPEND_STATUS)),
static uint8_t ao_radio_configured = 0;
-static void
-ao_radio_isr(void)
-{
- ao_exti_disable(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
- ao_radio_wake = 1;
- ao_wakeup(&ao_radio_wake);
-}
static void
ao_radio_setup(void)
for (i = 0; i < sizeof (radio_setup) / sizeof (radio_setup[0]); i += 2)
ao_radio_reg_write(radio_setup[i], radio_setup[i+1]);
- /* Enable marc status interrupt on gpio 2 pin */
- ao_radio_reg_write(CC1120_IOCFG2, CC1120_IOCFG_GPIO_CFG_MARC_MCU_WAKEUP);
-
ao_radio_set_packet();
ao_config_get();
ao_radio_rdf(RDF_PACKET_LEN);
}
+static void ao_radio_packet(void) {
+ static uint8_t packet[] = {
+#if 1
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+#else
+ 3, 1, 2, 3
+#endif
+ };
+
+ ao_radio_send(packet, sizeof (packet));
+}
+
+void
+ao_radio_test_recv()
+{
+ ao_radio_recv(0, 34);
+}
+
#endif
static const struct ao_cmds ao_radio_cmds[] = {
#if CC1120_DEBUG
{ ao_radio_show, "R\0Show CC1120 status" },
{ ao_radio_beep, "b\0Emit an RDF beacon" },
+ { ao_radio_packet, "p\0Send a test packet" },
+ { ao_radio_test_recv, "q\0Recv a test packet" },
#endif
{ 0, NULL }
};
/* Enable the EXTI interrupt for the appropriate pin */
ao_enable_port(AO_CC1120_INT_PORT);
- ao_exti_setup(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN, AO_EXTI_MODE_FALLING, ao_radio_isr);
+ ao_exti_setup(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN, AO_EXTI_MODE_FALLING, ao_radio_tx_isr);
ao_cmd_register(&ao_radio_cmds[0]);
}
projects / fw / altos / blobdiff