static uint8_t ao_radio_abort; /* radio operation should abort */
static uint8_t ao_radio_mcu_wake; /* MARC status change */
static uint8_t ao_radio_marc_status; /* Last read MARC status value */
+static uint8_t ao_radio_tx_finished; /* MARC status indicates TX finished */
+
+int8_t ao_radio_rssi; /* Last received RSSI value */
#define CC1120_DEBUG AO_FEC_DEBUG
#define CC1120_TRACE 0
return in;
}
+#if 0
static uint8_t
ao_radio_fifo_read(uint8_t *data, uint8_t len)
{
ao_radio_deselect();
return status;
}
+#endif
static uint8_t
ao_radio_fifo_write_start(void)
return CC1120_FIFO_SIZE - ao_radio_reg_read(CC1120_NUM_TXBYTES);
}
+#if 0
static uint8_t
ao_radio_status(void)
{
return ao_radio_strobe (CC1120_SNOP);
}
+#endif
void
ao_radio_recv_abort(void)
{
ao_radio_mcu_wake = 0;
ao_radio_marc_status = ao_radio_get_marc_status();
-
+
/* Anyt other than 'tx/rx finished' means an error occurred */
if (ao_radio_marc_status & ~(CC1120_MARC_STATUS1_TX_FINISHED|CC1120_MARC_STATUS1_RX_FINISHED))
ao_radio_abort = 1;
+ if (ao_radio_marc_status & (CC1120_MARC_STATUS1_TX_FINISHED))
+ ao_radio_tx_finished = 1;
}
static void
ao_exti_set_callback(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN, ao_radio_isr);
ao_exti_enable(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
ao_exti_enable(AO_CC1120_MCU_WAKEUP_PORT, AO_CC1120_MCU_WAKEUP_PIN);
+ ao_radio_tx_finished = 0;
ao_radio_strobe(CC1120_STX);
}
uint8_t state = ao_radio_strobe(CC1120_SIDLE);
if ((state >> CC1120_STATUS_STATE) == CC1120_STATUS_STATE_IDLE)
break;
+ if ((state >> CC1120_STATUS_STATE) == CC1120_STATUS_STATE_TX_FIFO_ERROR)
+ ao_radio_strobe(CC1120_SFTX);
}
/* Flush any pending TX bytes */
ao_radio_strobe(CC1120_SFTX);
#define PACKET_DEV_M 80
/*
- * For our packet data, set the symbol rate to 38400 Baud
+ * For our packet data
*
* (2**20 + DATARATE_M) * 2 ** DATARATE_E
* Rdata = -------------------------------------- * fosc
* 2 ** 39
*
+ * Symbol rate 38400 Baud:
*
* DATARATE_M = 239914
* DATARATE_E = 9
+ * CHANBW = 74.42 (round to 100)
+ *
+ * Symbol rate 9600 Baud:
+ *
+ * DATARATE_M = 239914
+ * DATARATE_E = 7
+ * CHANBW = 58.58 (round to 62.5)
+ *
+ * Symbol rate 2400 Baud:
+ *
+ * DATARATE_M = 239914
+ * DATARATE_E = 5
+ * CHANBW = 47.61 (round to 50)
*/
-#define PACKET_DRATE_E 9
+
#define PACKET_DRATE_M 239914
+#define PACKET_DRATE_E_384 9
+#define PACKET_CHAN_BW_384 0x02 /* 200 / 2 = 100 */
+
+#define PACKET_DRATE_E_96 7
+#define PACKET_CHAN_BW_96 0x42 /* 125 / 2 = 62.5 */
+
+#define PACKET_DRATE_E_24 5
+#define PACKET_CHAN_BW_24 0x04 /* 200 / 4 = 50 */
+
static const uint16_t packet_setup[] = {
CC1120_DEVIATION_M, PACKET_DEV_M,
CC1120_MODCFG_DEV_E, ((CC1120_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1120_MODCFG_DEV_E_MODEM_MODE) |
(CC1120_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1120_MODCFG_DEV_E_MOD_FORMAT) |
(PACKET_DEV_E << CC1120_MODCFG_DEV_E_DEV_E)),
- CC1120_DRATE2, ((PACKET_DRATE_E << CC1120_DRATE2_DATARATE_E) |
- (((PACKET_DRATE_M >> 16) & CC1120_DRATE2_DATARATE_M_19_16_MASK) << CC1120_DRATE2_DATARATE_M_19_16)),
CC1120_DRATE1, ((PACKET_DRATE_M >> 8) & 0xff),
CC1120_DRATE0, ((PACKET_DRATE_M >> 0) & 0xff),
CC1120_PKT_CFG2, ((CC1120_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1120_PKT_CFG2_CCA_MODE) |
(0 << CC1120_PKT_CFG0_PKG_BIT_LEN) |
(0 << CC1120_PKT_CFG0_UART_MODE_EN) |
(0 << CC1120_PKT_CFG0_UART_SWAP_EN)),
+ CC1120_PREAMBLE_CFG1, ((CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_4_BYTES << CC1120_PREAMBLE_CFG1_NUM_PREAMBLE) |
+ (CC1120_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1120_PREAMBLE_CFG1_PREAMBLE_WORD)),
AO_CC1120_MARC_GPIO_IOCFG, CC1120_IOCFG_GPIO_CFG_MARC_MCU_WAKEUP,
};
+static const uint16_t packet_setup_384[] = {
+ CC1120_DRATE2, ((PACKET_DRATE_E_384 << CC1120_DRATE2_DATARATE_E) |
+ (((PACKET_DRATE_M >> 16) & CC1120_DRATE2_DATARATE_M_19_16_MASK) << CC1120_DRATE2_DATARATE_M_19_16)),
+ CC1120_CHAN_BW, PACKET_CHAN_BW_384,
+ CC1120_PA_CFG0, 0x7b,
+};
+
+static const uint16_t packet_setup_96[] = {
+ CC1120_DRATE2, ((PACKET_DRATE_E_96 << CC1120_DRATE2_DATARATE_E) |
+ (((PACKET_DRATE_M >> 16) & CC1120_DRATE2_DATARATE_M_19_16_MASK) << CC1120_DRATE2_DATARATE_M_19_16)),
+ CC1120_CHAN_BW, PACKET_CHAN_BW_96,
+ CC1120_PA_CFG0, 0x7d,
+};
+
+static const uint16_t packet_setup_24[] = {
+ CC1120_DRATE2, ((PACKET_DRATE_E_24 << CC1120_DRATE2_DATARATE_E) |
+ (((PACKET_DRATE_M >> 16) & CC1120_DRATE2_DATARATE_M_19_16_MASK) << CC1120_DRATE2_DATARATE_M_19_16)),
+ CC1120_CHAN_BW, PACKET_CHAN_BW_24,
+ CC1120_PA_CFG0, 0x7e,
+};
+
static const uint16_t packet_tx_setup[] = {
CC1120_PKT_CFG2, ((CC1120_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1120_PKT_CFG2_CCA_MODE) |
(CC1120_PKT_CFG2_PKT_FORMAT_NORMAL << CC1120_PKT_CFG2_PKT_FORMAT)),
(0 << CC1120_PKT_CFG0_PKG_BIT_LEN) |
(0 << CC1120_PKT_CFG0_UART_MODE_EN) |
(0 << CC1120_PKT_CFG0_UART_SWAP_EN)),
+ CC1120_PREAMBLE_CFG1, ((CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_NONE << CC1120_PREAMBLE_CFG1_NUM_PREAMBLE) |
+ (CC1120_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1120_PREAMBLE_CFG1_PREAMBLE_WORD)),
+ CC1120_PA_CFG0, 0x7e,
};
/*
- * APRS deviation is 5kHz
+ * APRS deviation is 3kHz
*
* fdev = fosc >> 24 * (256 + dev_m) << dev_e
*
- * 32e6Hz / (2 ** 24) * (256 + 71) * (2 ** 3) = 4989
+ * 32e6Hz / (2 ** 24) * (256 + 137) * (2 ** 2) = 2998Hz
*/
-#define APRS_DEV_E 3
-#define APRS_DEV_M 71
-#define APRS_PACKET_LEN 50
+#define APRS_DEV_E 2
+#define APRS_DEV_M 137
/*
* For our APRS beacon, set the symbol rate to 9.6kBaud (8x oversampling for 1200 baud data rate)
(CC1120_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1120_PKT_CFG1_ADDR_CHECK_CFG) |
(CC1120_PKT_CFG1_CRC_CFG_DISABLED << CC1120_PKT_CFG1_CRC_CFG) |
(0 << CC1120_PKT_CFG1_APPEND_STATUS)),
+ CC1120_PREAMBLE_CFG1, ((CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_NONE << CC1120_PREAMBLE_CFG1_NUM_PREAMBLE) |
+ (CC1120_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1120_PREAMBLE_CFG1_PREAMBLE_WORD)),
+ CC1120_PA_CFG0, 0x7d,
+};
+
+/*
+ * For Test mode, we want an unmodulated carrier. To do that, we
+ * set the deviation to zero and enable a preamble so that the radio
+ * turns on before we send any data
+ */
+
+static const uint16_t test_setup[] = {
+ CC1120_DEVIATION_M, 0,
+ CC1120_MODCFG_DEV_E, ((CC1120_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1120_MODCFG_DEV_E_MODEM_MODE) |
+ (CC1120_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1120_MODCFG_DEV_E_MOD_FORMAT) |
+ (0 << CC1120_MODCFG_DEV_E_DEV_E)),
+ CC1120_DRATE2, ((APRS_DRATE_E << CC1120_DRATE2_DATARATE_E) |
+ (((APRS_DRATE_M >> 16) & CC1120_DRATE2_DATARATE_M_19_16_MASK) << CC1120_DRATE2_DATARATE_M_19_16)),
+ CC1120_DRATE1, ((APRS_DRATE_M >> 8) & 0xff),
+ CC1120_DRATE0, ((APRS_DRATE_M >> 0) & 0xff),
+ CC1120_PKT_CFG2, ((CC1120_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1120_PKT_CFG2_CCA_MODE) |
+ (CC1120_PKT_CFG2_PKT_FORMAT_NORMAL << CC1120_PKT_CFG2_PKT_FORMAT)),
+ CC1120_PKT_CFG1, ((0 << CC1120_PKT_CFG1_WHITE_DATA) |
+ (CC1120_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1120_PKT_CFG1_ADDR_CHECK_CFG) |
+ (CC1120_PKT_CFG1_CRC_CFG_DISABLED << CC1120_PKT_CFG1_CRC_CFG) |
+ (0 << CC1120_PKT_CFG1_APPEND_STATUS)),
+ CC1120_PREAMBLE_CFG1, ((CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_4_BYTES << CC1120_PREAMBLE_CFG1_NUM_PREAMBLE) |
+ (CC1120_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1120_PREAMBLE_CFG1_PREAMBLE_WORD)),
};
#define AO_PKT_CFG0_INFINITE ((0 << CC1120_PKT_CFG0_RESERVED7) | \
#define AO_RADIO_MODE_BITS_PACKET_RX 16
#define AO_RADIO_MODE_BITS_RDF 32
#define AO_RADIO_MODE_BITS_APRS 64
-#define AO_RADIO_MODE_BITS_INFINITE 128
-#define AO_RADIO_MODE_BITS_FIXED 256
+#define AO_RADIO_MODE_BITS_TEST 128
+#define AO_RADIO_MODE_BITS_INFINITE 256
+#define AO_RADIO_MODE_BITS_FIXED 512
#define AO_RADIO_MODE_NONE 0
#define AO_RADIO_MODE_PACKET_TX_BUF (AO_RADIO_MODE_BITS_PACKET | AO_RADIO_MODE_BITS_PACKET_TX | AO_RADIO_MODE_BITS_TX_BUF)
#define AO_RADIO_MODE_APRS_BUF (AO_RADIO_MODE_BITS_APRS | AO_RADIO_MODE_BITS_INFINITE | AO_RADIO_MODE_BITS_TX_BUF)
#define AO_RADIO_MODE_APRS_LAST_BUF (AO_RADIO_MODE_BITS_APRS | AO_RADIO_MODE_BITS_FIXED | AO_RADIO_MODE_BITS_TX_BUF)
#define AO_RADIO_MODE_APRS_FINISH (AO_RADIO_MODE_BITS_APRS | AO_RADIO_MODE_BITS_FIXED | AO_RADIO_MODE_BITS_TX_FINISH)
+#define AO_RADIO_MODE_TEST (AO_RADIO_MODE_BITS_TEST | AO_RADIO_MODE_BITS_INFINITE | AO_RADIO_MODE_BITS_TX_BUF)
+
+static void
+_ao_radio_set_regs(const uint16_t *regs, int nreg)
+{
+ int i;
+
+ for (i = 0; i < nreg; i++) {
+ ao_radio_reg_write(regs[0], regs[1]);
+ regs += 2;
+ }
+}
+
+#define ao_radio_set_regs(setup) _ao_radio_set_regs(setup, (sizeof (setup) / sizeof(setup[0])) >> 1)
static void
ao_radio_set_mode(uint16_t new_mode)
{
uint16_t changes;
- int i;
if (new_mode == ao_radio_mode)
return;
changes = new_mode & (~ao_radio_mode);
- if (changes & AO_RADIO_MODE_BITS_PACKET)
- for (i = 0; i < sizeof (packet_setup) / sizeof (packet_setup[0]); i += 2)
- ao_radio_reg_write(packet_setup[i], packet_setup[i+1]);
+
+ if (changes & AO_RADIO_MODE_BITS_PACKET) {
+ ao_radio_set_regs(packet_setup);
+
+ switch (ao_config.radio_rate) {
+ default:
+ case AO_RADIO_RATE_38400:
+ ao_radio_set_regs(packet_setup_384);
+ break;
+ case AO_RADIO_RATE_9600:
+ ao_radio_set_regs(packet_setup_96);
+ break;
+ case AO_RADIO_RATE_2400:
+ ao_radio_set_regs(packet_setup_24);
+ break;
+ }
+ }
if (changes & AO_RADIO_MODE_BITS_PACKET_TX)
- for (i = 0; i < sizeof (packet_tx_setup) / sizeof (packet_tx_setup[0]); i += 2)
- ao_radio_reg_write(packet_tx_setup[i], packet_tx_setup[i+1]);
-
+ ao_radio_set_regs(packet_tx_setup);
+
if (changes & AO_RADIO_MODE_BITS_TX_BUF)
ao_radio_reg_write(AO_CC1120_INT_GPIO_IOCFG, CC1120_IOCFG_GPIO_CFG_TXFIFO_THR);
ao_radio_reg_write(AO_CC1120_INT_GPIO_IOCFG, CC1120_IOCFG_GPIO_CFG_RX0TX1_CFG);
if (changes & AO_RADIO_MODE_BITS_PACKET_RX)
- for (i = 0; i < sizeof (packet_rx_setup) / sizeof (packet_rx_setup[0]); i += 2)
- ao_radio_reg_write(packet_rx_setup[i], packet_rx_setup[i+1]);
-
+ ao_radio_set_regs(packet_rx_setup);
+
if (changes & AO_RADIO_MODE_BITS_RDF)
- for (i = 0; i < sizeof (rdf_setup) / sizeof (rdf_setup[0]); i += 2)
- ao_radio_reg_write(rdf_setup[i], rdf_setup[i+1]);
+ ao_radio_set_regs(rdf_setup);
if (changes & AO_RADIO_MODE_BITS_APRS)
- for (i = 0; i < sizeof (aprs_setup) / sizeof (aprs_setup[0]); i += 2)
- ao_radio_reg_write(aprs_setup[i], aprs_setup[i+1]);
+ ao_radio_set_regs(aprs_setup);
+
+ if (changes & AO_RADIO_MODE_BITS_TEST)
+ ao_radio_set_regs(test_setup);
if (changes & AO_RADIO_MODE_BITS_INFINITE)
ao_radio_reg_write(CC1120_PKT_CFG0, AO_PKT_CFG0_INFINITE);
static void
ao_radio_setup(void)
{
- int i;
-
ao_radio_strobe(CC1120_SRES);
- for (i = 0; i < sizeof (radio_setup) / sizeof (radio_setup[0]); i += 2)
- ao_radio_reg_write(radio_setup[i], radio_setup[i+1]);
+ ao_radio_set_regs(radio_setup);
ao_radio_mode = 0;
ao_radio_get(uint8_t len)
{
static uint32_t last_radio_setting;
+ static uint8_t last_radio_rate;
ao_mutex_get(&ao_radio_mutex);
+
if (!ao_radio_configured)
ao_radio_setup();
if (ao_config.radio_setting != last_radio_setting) {
ao_radio_reg_write(CC1120_FREQ0, ao_config.radio_setting);
last_radio_setting = ao_config.radio_setting;
}
+ if (ao_config.radio_rate != last_radio_rate) {
+ ao_radio_mode &= ~AO_RADIO_MODE_BITS_PACKET;
+ last_radio_rate = ao_config.radio_rate;
+ }
ao_radio_set_len(len);
}
ao_packet_slave_stop();
#endif
ao_radio_get(0xff);
+ ao_radio_set_mode(AO_RADIO_MODE_TEST);
ao_radio_strobe(CC1120_STX);
#if CC1120_TRACE
- { int t;
+ { int t;
for (t = 0; t < 10; t++) {
printf ("status: %02x\n", ao_radio_status());
ao_delay(AO_MS_TO_TICKS(100));
}
static void
-ao_radio_wait_isr(void)
+ao_radio_wait_isr(uint16_t timeout)
{
+ if (timeout)
+ ao_alarm(timeout);
ao_arch_block_interrupts();
while (!ao_radio_wake && !ao_radio_mcu_wake && !ao_radio_abort)
- ao_sleep(&ao_radio_wake);
+ if (ao_sleep(&ao_radio_wake))
+ ao_radio_abort = 1;
ao_arch_release_interrupts();
+ if (timeout)
+ ao_clear_alarm();
if (ao_radio_mcu_wake)
ao_radio_check_marc_status();
}
uint8_t fifo_space = 0;
do {
- ao_radio_wait_isr();
+ ao_radio_wait_isr(0);
if (!wait_fifo)
return 0;
fifo_space = ao_radio_tx_fifo_space();
void
ao_radio_send(const void *d, uint8_t size)
{
- uint8_t marc_status;
uint8_t *e = tx_data;
uint8_t encode_len;
uint8_t this_len;
ao_radio_get(encode_len);
+ ao_radio_abort = 0;
+
+ /* Flush any pending TX bytes */
+ ao_radio_strobe(CC1120_SFTX);
+
started = 0;
fifo_space = CC1120_FIFO_SIZE;
while (encode_len) {
} else {
ao_exti_enable(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
}
-
+
fifo_space = ao_radio_wait_tx(encode_len != 0);
if (ao_radio_abort) {
ao_radio_idle();
break;
}
}
+ while (started && !ao_radio_abort && !ao_radio_tx_finished)
+ ao_radio_wait_isr(0);
ao_radio_put();
}
#define AO_RADIO_LOTS 64
void
-ao_radio_send_lots(ao_radio_fill_func fill)
+ao_radio_send_aprs(ao_radio_fill_func fill)
{
uint8_t buf[AO_RADIO_LOTS], *b;
int cnt;
/* Wait for some space in the fifo */
while (!ao_radio_abort && (fifo_space = ao_radio_tx_fifo_space()) == 0) {
ao_radio_wake = 0;
- ao_radio_wait_isr();
+ ao_radio_wait_isr(0);
}
if (ao_radio_abort)
break;
}
/* Wait for the transmitter to go idle */
ao_radio_wake = 0;
- ao_radio_wait_isr();
+ ao_radio_wait_isr(0);
}
ao_radio_put();
}
}
uint8_t
-ao_radio_recv(__xdata void *d, uint8_t size)
+ao_radio_recv(__xdata void *d, uint8_t size, uint8_t timeout)
{
uint8_t len;
- uint16_t i;
- uint8_t rssi;
+ uint8_t radio_rssi = 0;
+ uint8_t rssi0;
uint8_t ret;
- static int been_here = 0;
size -= 2; /* status bytes */
if (size > AO_RADIO_MAX_RECV) {
ao_radio_strobe(CC1120_SRX);
/* Wait for the preamble to appear */
- ao_radio_wait_isr();
- if (ao_radio_abort)
+ ao_radio_wait_isr(timeout);
+ if (ao_radio_abort) {
+ ret = 0;
goto abort;
+ }
ao_radio_reg_write(AO_CC1120_INT_GPIO_IOCFG, CC1120_IOCFG_GPIO_CFG_CLKEN_SOFT);
ao_exti_set_mode(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN,
ao_radio_burst_read_stop();
abort:
- ao_radio_strobe(CC1120_SIDLE);
-
/* Convert from 'real' rssi to cc1111-style values */
- rssi = AO_RADIO_FROM_RSSI(ao_radio_reg_read(CC1120_RSSI1));
+ rssi0 = ao_radio_reg_read(CC1120_RSSI0);
+ if (rssi0 & 1) {
+ int8_t rssi = ao_radio_reg_read(CC1120_RSSI1);
+ ao_radio_rssi = rssi;
+
+ /* Bound it to the representable range */
+ if (rssi > -11)
+ rssi = -11;
+ radio_rssi = AO_RADIO_FROM_RSSI (rssi);
+ }
+
+ ao_radio_strobe(CC1120_SIDLE);
ao_radio_put();
/* Store the received RSSI value; the crc-OK byte is already done */
- ((uint8_t *) d)[size] = (uint8_t) rssi;
+ ((uint8_t *) d)[size] = radio_rssi;
#if AO_PROFILE
rx_last_done_tick = rx_done_tick;
void
ao_radio_init(void)
{
- int i;
-
ao_radio_configured = 0;
ao_spi_init_cs (AO_CC1120_SPI_CS_PORT, (1 << AO_CC1120_SPI_CS_PIN));
projects / fw / altos / blobdiff