+#define ao_arch_isr_stack() \
+ /* Empty the stack; might as well let interrupts have the whole thing */ \
+ (SP = AO_STACK_START - 1)
+
+#define ao_arch_cpu_idle() (PCON = PCON_IDLE)
+
+#define ao_arch_restore_stack() { \
+ uint8_t stack_len; \
+ __data uint8_t *stack_ptr; \
+ __xdata uint8_t *save_ptr; \
+ \
+ /* Restore the old stack */ \
+ stack_len = ao_cur_task->stack_count; \
+ SP = AO_STACK_START - 1 + stack_len; \
+ \
+ stack_ptr = (uint8_t __data *) AO_STACK_START; \
+ save_ptr = (uint8_t __xdata *) ao_cur_task->stack; \
+ do \
+ *stack_ptr++ = *save_ptr++; \
+ while (--stack_len); \
+ \
+ _asm \
+ pop _bp \
+ pop PSW \
+ pop ar1 \
+ pop ar0 \
+ pop ar7 \
+ pop ar6 \
+ pop ar5 \
+ pop ar4 \
+ pop ar3 \
+ pop ar2 \
+ pop b \
+ pop DPH \
+ pop DPL \
+ /* The next byte of the stack is the IE register. Only the global \
+ enable bit forms part of the task context. Pop off the IE then set \
+ the global enable bit to match that of the stored IE register. */ \
+ pop ACC \
+ JB ACC.7,0098$ \
+ CLR _EA \
+ LJMP 0099$ \
+ 0098$: \
+ SETB _EA \
+ 0099$: \
+ /* Finally pop off the ACC, which was the first register saved. */ \
+ pop ACC \
+ ret \
+ _endasm; \
+}
+
+#define ao_arch_critical(b) __critical { b }