altos: Split avr clock initialization to ao_clock.c

[fw/altos] / src / avr / ao_timer.c

diff --git a/src/avr/ao_timer.c b/src/avr/ao_timer.c
index 1e374c75a4c99fac30e8a28ff229b8a6c449633b..eef14345dda7d5bf96a09881c61c6b27915c4975 100644 (file)
--- a/src/avr/ao_timer.c
+++ b/src/avr/ao_timer.c
@@ -87,61 +87,3 @@ ao_timer_init(void)
 
        TIMSK1 = (1 << OCIE1A);         /* Interrupt on compare match */
 }
-
-/*
- * AltOS always cranks the clock to the max frequency
- */
-void
-ao_clock_init(void)
-{
-       /* disable RC clock */
-       CLKSEL0 &= ~(1 << RCE);
-
-       /* Disable PLL */
-       PLLCSR &= ~(1 << PLLE);
-
-       /* Enable external clock */
-       CLKSEL0 |= (1 << EXTE);
-
-       /* wait for external clock to be ready */
-       while ((CLKSTA & (1 << EXTON)) == 0)
-               ;
-
-       /* select external clock */
-       CLKSEL0 |= (1 << CLKS);
-
-       /* Disable the clock prescaler */
-       cli();
-       CLKPR = (1 << CLKPCE);
-
-       /* Always run the system clock at 8MHz */
-#if AVR_CLOCK > 12000000UL
-       CLKPR = 1;
-#else
-       CLKPR = 0;
-#endif
-       sei();
-
-       /* Set up the PLL to use the crystal */
-
-       /* Use primary system clock as PLL source */
-       PLLFRQ = ((0 << PINMUX) |       /* Use primary clock */
-                 (0 << PLLUSB) |       /* No divide by 2 for USB */
-                 (0 << PLLTM0) |       /* Disable high speed timer */
-                 (0x4 << PDIV0));      /* 48MHz PLL clock */
-
-       /* Set the frequency of the crystal */
-#if AVR_CLOCK > 12000000UL
-       PLLCSR |= (1 << PINDIV);        /* For 16MHz crystal on Teensy board */
-#else
-       PLLCSR &= ~(1 << PINDIV);       /* For 8MHz crystal on TeleScience board */
-#endif
-
-       /* Enable the PLL */
-       PLLCSR |= (1 << PLLE);
-       while (!(PLLCSR & (1 << PLOCK)))
-               ;
-
-       set_sleep_mode(SLEEP_MODE_IDLE);
-       sleep_enable();
-}