Update .gitignore files

[fw/altos] / src / ao_timer.c

diff --git a/src/ao_timer.c b/src/ao_timer.c
index 81c3b376214ffddac88e19113d2e433cafc89d74..d1731475c226eee9992ae00315c333b1877f2285 100644 (file)
--- a/src/ao_timer.c
+++ b/src/ao_timer.c
@@ -24,37 +24,42 @@ uint16_t ao_time(void) __critical
        return ao_tick_count;
 }
 
+static __xdata uint8_t ao_forever;
+
 void
 ao_delay(uint16_t ticks)
 {
-       uint16_t until = ao_time() + ticks;
-
-       while ((int16_t) (until - ao_time()) > 0)
-               ao_sleep(DATA_TO_XDATA(&ao_tick_count));
+       ao_alarm(ticks);
+       ao_sleep(&ao_forever);
 }
 
 #define T1_CLOCK_DIVISOR       8       /* 24e6/8 = 3e6 */
 #define T1_SAMPLE_TIME         30000   /* 3e6/30000 = 100 */
 
+#if HAS_ADC
 volatile __data uint8_t        ao_adc_interval = 1;
 volatile __data uint8_t        ao_adc_count;
+#endif
 
 void ao_timer_isr(void) interrupt 9
 {
        ++ao_tick_count;
+#if HAS_ADC
        if (++ao_adc_count == ao_adc_interval) {
                ao_adc_count = 0;
                ao_adc_poll();
        }
-       ao_wakeup(DATA_TO_XDATA(&ao_tick_count));
+#endif
 }
 
+#if HAS_ADC
 void
 ao_timer_set_adc_interval(uint8_t interval) __critical
 {
        ao_adc_interval = interval;
        ao_adc_count = 0;
 }
+#endif
 
 void
 ao_timer_init(void)
@@ -83,3 +88,24 @@ ao_timer_init(void)
        /* enable timer 1 in module mode, dividing by 8 */
        T1CTL = T1CTL_MODE_MODULO | T1CTL_DIV_8;
 }
+
+/*
+ * AltOS always cranks the clock to the max frequency
+ */
+void
+ao_clock_init(void)
+{
+       /* Switch system clock to crystal oscilator */
+       CLKCON = (CLKCON & ~CLKCON_OSC_MASK) | (CLKCON_OSC_XTAL);
+
+       while (!(SLEEP & SLEEP_XOSC_STB))
+               ;
+
+       /* Crank up the timer tick and system clock speed */
+       CLKCON = ((CLKCON & ~(CLKCON_TICKSPD_MASK | CLKCON_CLKSPD_MASK)) |
+                 (CLKCON_TICKSPD_1 | CLKCON_CLKSPD_1));
+
+       while ((CLKCON & (CLKCON_TICKSPD_MASK|CLKCON_CLKSPD_MASK)) !=
+              (CLKCON_TICKSPD_1 | CLKCON_CLKSPD_1))
+               ;
+}