Wait for a while when switching the RESET_N line

[fw/altos] / lib / ccdbg.h

diff --git a/lib/ccdbg.h b/lib/ccdbg.h
index 834092b2cd21a4e4423a5cbe740bc6342f9512e6..8bc9444a2e00269230624c9674b54354488dea8d 100644 (file)
--- a/lib/ccdbg.h
+++ b/lib/ccdbg.h
@@ -37,13 +37,21 @@
 #define CC_RESET_N     0x4
 #define CC_CLOCK_US    (0)
 
+/* Telemetrum has a 10k pull-up to 3.3v, a 0.001uF cap to ground
+ * and a 2.7k resistor to the reset line. This takes about 6us
+ * to settle, so we'll wait longer than that after changing the reset line
+ */
+#define CC_RESET_US    (12)
+
 /* 8051 instructions
  */
+#define NOP                    0x00
 #define MOV_direct_data                0x75
 #define LJMP                   0x02
 #define MOV_Rn_data(n)         (0x78 | (n))
 #define DJNZ_Rn_rel(n)         (0xd8 | (n))
 #define MOV_A_direct           0xe5
+#define MOV_direct1_direct2    0x85
 #define MOV_direct_A           0xf5
 #define MOV_DPTR_data16                0x90
 #define MOV_A_data             0x74
@@ -57,6 +65,13 @@
 /* 8051 special function registers
  */
 
+#define SFR_P0                 0x80
+#define SFR_SP                 0x81
+#define SFR_DPL0               0x82
+#define SFR_DPH0               0x83
+#define SFR_DPL1               0x84
+#define SFR_DPH1               0x85
+
 /* flash controller */
 #define FWT                    0xAB
 #define FADDRL                 0xAC
@@ -91,6 +106,9 @@
 /* Bit-addressable accumulator */
 #define ACC(bit)               (0xE0 | (bit))
 
+/* Bit-addressable status word */
+#define PSW(bit)               (0xD0 | (bit))
+
 #define CP_USB_ASYNC
 
 struct ccdbg {
@@ -99,6 +117,7 @@ struct ccdbg {
 #else
        struct cp_usb *cp;
 #endif
+       struct hex_image *rom;
 };
 
 /* Intel hex file format data
@@ -122,6 +141,18 @@ struct hex_image {
        uint8_t         data[0];
 };
 
+#define CC_STATE_ACC   0x1
+#define CC_STATE_PSW   0x2
+#define CC_STATE_DP    0x4
+
+#define CC_STATE_NSFR  5
+
+struct ccstate {
+       uint16_t        mask;
+       uint8_t         acc;
+       uint8_t         sfr[CC_STATE_NSFR];
+};
+
 #define HEX_RECORD_NORMAL              0x00
 #define HEX_RECORD_EOF                 0x01
 #define HEX_RECORD_EXTENDED_ADDRESS    0x02
@@ -233,9 +264,15 @@ int
 ccdbg_hex_image_equal(struct hex_image *a, struct hex_image *b);
 
 /* ccdbg-io.c */
+void
+ccdbg_set_clock(uint32_t us);
+
 void
 ccdbg_half_clock(struct ccdbg *dbg);
 
+void
+ccdbg_wait_reset(struct ccdbg *dbg);
+
 int
 ccdbg_write(struct ccdbg *dbg, uint8_t mask, uint8_t value);
 
@@ -323,4 +360,36 @@ ccdbg_write_hex_image(struct ccdbg *dbg, struct hex_image *image, uint16_t offse
 struct hex_image *
 ccdbg_read_hex_image(struct ccdbg *dbg, uint16_t address, uint16_t length);
 
+uint8_t
+ccdbg_read_sfr(struct ccdbg *dbg, uint8_t addr, uint8_t *bytes, int nbytes);
+
+uint8_t
+ccdbg_write_sfr(struct ccdbg *dbg, uint8_t addr, uint8_t *bytes, int nbytes);
+
+/* ccdbg-rom.c */
+uint8_t
+ccdbg_set_rom(struct ccdbg *dbg, struct hex_image *rom);
+
+uint8_t
+ccdbg_rom_contains(struct ccdbg *dbg, uint16_t addr, int nbytes);
+
+uint8_t
+ccdbg_rom_replace_xmem(struct ccdbg *dbg,
+                      uint16_t addrp, uint8_t *bytesp, int nbytes);
+
+/* ccdbg-state.c */
+uint8_t
+ccdbg_state_save(struct ccdbg *dbg, struct ccstate *state, unsigned int mask);
+
+uint8_t
+ccdbg_state_restore(struct ccdbg *dbg, struct ccstate *state);
+
+void
+ccdbg_state_replace_xmem(struct ccdbg *dbg, struct ccstate *state,
+                        uint16_t addr, uint8_t *bytes, int nbytes);
+
+void
+ccdbg_state_replace_sfr(struct ccdbg *dbg, struct ccstate *state,
+                       uint8_t addr, uint8_t *bytes, int nbytes);
+
 #endif /* _CCDBG_H_ */