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   1 # Copyright 2009 Free Software Foundation, Inc.
   2 #
   3 # This file is part of GNU Radio
   4 #
   5 # GNU Radio is free software; you can redistribute it and/or modify
   6 # it under the terms of the GNU General Public License as published by
   7 # the Free Software Foundation; either version 3, or (at your option)
   8 # any later version.
   9 #
  10 # GNU Radio is distributed in the hope that it will be useful,
  11 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 # GNU General Public License for more details.
  14 #
  15 # You should have received a copy of the GNU General Public License
  16 # along with GNU Radio; see the file COPYING.  If not, write to
  17 # the Free Software Foundation, Inc., 51 Franklin Street,
  18 # Boston, MA 02110-1301, USA.
  19 #
  20
  21 import common
  22 from gnuradio import gr, usrp
  23
  24 ####################################################################
  25 # Simple USRP Source
  26 ####################################################################
  27 class _simple_source(gr.hier_block2):
  28         """A single usrp source of IO type short or complex."""
  29
  30         def __init__(self, which, side='A', rx_ant='RXA', no_hb=False):
  31                 """
  32                 USRP simple source contructor.
  33                 @param which the unit number
  34                 @param side the usrp side A or B
  35                 @param rx_ant the antenna choice
  36                 @param no_hb disable half band filters
  37                 """
  38                 self._no_hb = no_hb
  39                 #initialize hier2 block
  40                 gr.hier_block2.__init__(
  41                         self, 'usrp_simple_source',
  42                         gr.io_signature(0, 0, 0),
  43                         gr.io_signature(1, 1, self._get_io_size()),
  44                 )
  45                 #create usrp object
  46                 if self._no_hb: self._make_usrp(which=which, nchan=1, fpga_filename="std_4rx_0tx.rbf")
  47                 else: self._make_usrp(which=which, nchan=1)
  48                 subdev_spec = common.to_spec(side, rx_ant)
  49                 self._get_u().set_mux(self._get_u().determine_rx_mux_value(subdev_spec))
  50                 self._subdev = self._get_u().selected_subdev(subdev_spec)
  51                 if common.is_flex(rx_ant): self._subdev.select_rx_antenna(rx_ant)
  52                 #connect
  53                 self.connect(self._get_u(), self)
  54
  55         def set_decim_rate(self, decim):
  56                 self._get_u().set_decim_rate(int(decim))
  57                 if self._no_hb: #set the BW to half the sample rate
  58                         self._subdev.set_bw(self._get_u().converter_rate()/decim/2)
  59         def set_lo_offset(self, lo_offset): self._subdev.set_lo_offset(lo_offset)
  60         def set_frequency(self, frequency, verbose=False):
  61                 self._set_frequency(
  62                         chan=0, #ddc0
  63                         subdev=self._subdev,
  64                         frequency=frequency,
  65                         verbose=verbose,
  66                 )
  67         def set_gain(self, gain): self._subdev.set_gain(gain)
  68
  69 class simple_source_c(_simple_source, common.usrp_source_c): pass
  70 class simple_source_s(_simple_source, common.usrp_source_s): pass
  71
  72 ####################################################################
  73 # Simple USRP Sink
  74 ####################################################################
  75 class _simple_sink(gr.hier_block2):
  76         """A single usrp sink of IO type short or complex."""
  77
  78         def __init__(self, which, side='A'):
  79                 """
  80                 USRP simple sink contructor.
  81                 @param which the unit number
  82                 @param side the usrp side A or B
  83                 """
  84                 #initialize hier2 block
  85                 gr.hier_block2.__init__(
  86                         self, 'usrp_simple_sink',
  87                         gr.io_signature(1, 1, self._get_io_size()),
  88                         gr.io_signature(0, 0, 0),
  89                 )
  90                 #create usrp object
  91                 self._make_usrp(which=which, nchan=1)
  92                 subdev_spec = common.to_spec(side)
  93                 self._get_u().set_mux(self._get_u().determine_tx_mux_value(subdev_spec))
  94                 self._subdev = self._get_u().selected_subdev(subdev_spec)
  95                 #connect
  96                 self.connect(self, self._get_u())
  97
  98         def set_interp_rate(self, interp): self._get_u().set_interp_rate(int(interp))
  99         def set_frequency(self, frequency, verbose=False):
 100                 self._set_frequency(
 101                         chan=self._subdev.which(),
 102                         subdev=self._subdev,
 103                         frequency=frequency,
 104                         verbose=verbose,
 105                 )
 106         def set_lo_offset(self, lo_offset): self._subdev.set_lo_offset(lo_offset)
 107         def set_gain(self, gain): self._subdev.set_gain(gain)
 108         def set_enable(self, enable): self._subdev.set_enable(enable)
 109         def set_auto_tr(self, auto_tr): self._subdev.set_auto_tr(auto_tr)
 110
 111 class simple_sink_c(_simple_sink, common.usrp_sink_c): pass
 112 class simple_sink_s(_simple_sink, common.usrp_sink_s): pass
 113