Tomas Vanek [Tue, 5 Feb 2019 08:39:11 +0000 (09:39 +0100)]
target/cortex_m: faster reading of all CPU registers
Without the change cortex_m_debug_entry() reads all registers
calling cortex_m_load_core_reg_u32() for each register with
a poor usage of JTAG/SWD queue.
It is time consuming, especially on an USB FS based adapter.
Moreover if target_request debugmsgs are enabled, DCB_DCRDR
is saved and restored on each register read.
This change introduces cortex_m_fast_read_all_regs()
which queues all register reads and a single dap_run() transaction
does all work.
cortex_m_fast_read_all_regs() reads all registers unconditionally
regardless register cache is valid or not. This is a difference
from the original cortex_m_debug_entry() code.
cortex_m_debug_entry times from -d3 log, Cortex-M4F and CMSIS-DAP
(Kinetis K28F-FRDM kit)
target_request | time [ms]
debugmsgs | without the change | with the change
---------------+--------------------+-----------------
disable | 186 | 27
enable | 232 | 29
Added checking of DHCSR.S_REGRDY flag. If "not ready" is seen,
cortex_m->slow_register_read is set and fallback to the old
register read method cortex_m_slow_read_all_regs() is used
instead of cortex_m_fast_read_all_regs().
Change-Id: I0665d94b97ede217394640871dc451ec93410254 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/5321 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Mon, 14 Oct 2019 17:03:48 +0000 (19:03 +0200)]
cortex_m: poll S_REGRDY on register r/w
Accordingly to arm documentation [1], chapter C1.6.4, the
operation to read/write from/to core registers can require time,
and the specific flag DHCSR.S_REGRDY has to be polled to verify
that the operation has been completed.
The lack of check on S_REGRDY causes OpenOCD to fail handling
correctly the core registers on a Cortex-M4 emulated in a slow
FPGA, and it could also fail on devices clocked at very low speed
while using a fast adapter.
Poll S_REGRDY as specified in [1] while either reading or writing
the core registers.
A timeout of 0.5s is added. This could still be too small in some
extremely slow cases, but at least now we log the timeout event,
which can help tracking down such odd issue.
During register read include in the polling loop the read of DCRSR
and to flush the JTAG queue only once.
During register write, relax the write in DCRSR by removing the
atomicity that is now useless since followed by the atomic read to
S_REGRDY.
During register read include the read of DCRSR inside the polling
loop to relax the read of S_REGRDY since followed by the atomic
read to DCRSR.
This change has the drawback of adding other transfers to the
adapter while reading/writing the registers, so it is expected to
introduce some speed degradation during step-by-step.
Tomas Vanek [Thu, 22 Apr 2021 08:41:50 +0000 (10:41 +0200)]
target/cortex_m: cumulate DHCSR sticky bits
DCB DHCSR register contains S_RETIRE_ST and S_RESET_ST bits cleared
on a read.
The change introduces a helper function cortex_m_cumulate_dhcsr_sticky().
Call this function each time DHCSR is read to preserve S_RESET_ST state
in the case of a reset event was detected.
Introduce cortex_m_read_dhcsr_atomic_sticky() convenience helper to
read DHCSR, store it to cortex_m->dcb_dhcsr and cumulate sticky bits.
The cumulated state of S_RESET_ST is read and cleared in cortex_m_poll()
Change-Id: Ib679599f850fd219fb9418c6ff32eed7cf5740da Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6180 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tomas Vanek [Mon, 8 Nov 2021 13:24:33 +0000 (14:24 +0100)]
cortex_m: use cortex_m_write_debug_halt_mask() in cortex_m_single_step_core()
cortex_m_single_step_core() used mem_ap_write_atomic_u32() to manipulate
dhcsr bits unlike the rest of code, where a specialized function
cortex_m_write_debug_halt_mask() takes place.
Unify setting of dhcsr bits and use cortex_m_write_debug_halt_mask() here as well.
Extracted from [1].
[1] Antonio Borneo: 6207: cortex_m: rework handling of dcb_dhcsr
Link: https://review.openocd.org/c/openocd/+/6207
Change-Id: I9ef05ce88a9dce42e1d3d5404a4fe87ec86b5fe8 Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6676 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
GD32E23x from GigaDevice is cortex-M23 microcontroller and it can work with the stm32f1x driver.
Modifications are similar to this done for GD32F1x0 in #6164 (https://review.openocd.org/c/openocd/+/6164).
Configuration file is added because its cortex-M23 CPU ID is different.
I think that GigaDevice microcontrollers should be handled in an independent unit to separate them from STM32,
but nowadays quick solution is welcome.
Antonio Borneo [Sat, 13 Nov 2021 13:38:21 +0000 (14:38 +0100)]
jtagspi: fix build on MacOS
Commit be57b0ab847e ("Update jtagspi driver for 1-, 2- and 4-byte
addresses") introduces two incorrect format string for uint32_t
data types.
This cause build failure on MacOS:
src/flash/nor/jtagspi.c:474:35: error: format specifies type 'unsigned char'
but the argument has type 'uint32_t' (aka 'unsigned int') [-Werror,-Wformat]
LOG_DEBUG("status=0x%02" PRIx8, *status);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~
src/flash/nor/jtagspi.c:513:65: error: format specifies type 'unsigned char'
but the argument has type 'uint32_t' (aka 'unsigned int') [-Werror,-Wformat]
LOG_ERROR("Cannot enable write to flash. Status=0x%02" PRIx8, status);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~
Fix the format string.
Change-Id: I209053317c8b26c35c6f11be0553ccccc698c551 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: be57b0ab847e ("Update jtagspi driver for 1-, 2- and 4-byte addresses")
Reviewed-on: https://review.openocd.org/c/openocd/+/6701 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
The goal is to have one macro for this common operation and to
make such log entries look the same way - to make it more readable
for humans as well easier for parsing via scripts.
Change-Id: I6166565fc9040b03d3fca5c3aa44a1ccbcf96ad2 Signed-off-by: Jan Matyas <matyas@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6667 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Thu, 7 Oct 2021 10:13:28 +0000 (12:13 +0200)]
jtag: move adapter init/quit and speed to adapter.c
The configuration code for adapter parameters is spread around.
Move in adapter.c the code that handles the configuration of
adapter speed.
For convenience, move also the functions adapter_init() and
adapter_quit(), that anyway have no reason to be in file core.c
To simplify the review, the code moved is not modified. It will be
cleaned and adapted in the following changes.
Antonio Borneo [Wed, 6 Oct 2021 21:17:30 +0000 (23:17 +0200)]
jtag/adapter: move 'usb location' code in adapter.c
The configuration code for adapter parameters is spread around.
Add a struct in adapter.c aimed at containing all the adapter's
configuration data.
Move in adapter.c the code related to configuring 'usb location'
and the copyright tag.
Add adapter.h to export the functions.
While there:
- rework the copyright and the SPDX tag;
- rename the 'usb location' functions;
- remove the JTAG_SRC variable in Makefile.am.
Antonio Borneo [Thu, 7 Oct 2021 08:37:06 +0000 (10:37 +0200)]
jtag/core: get rid of variable 'jtag'
The variable 'jtag' is set to 'adapter_driver' during adapter
initialization and is used:
- to check if adapter has been initialized;
- as local copy of adapter_driver.
Introduce a static flag to check if the adapter has been already
initialized and a convenience test function.
Use the test function and the original value of adapter_driver in
the code and drop the variable 'jtag'.
Andreas Bolsch [Mon, 28 Jan 2019 09:37:53 +0000 (10:37 +0100)]
Update jtagspi driver for 1-, 2- and 4-byte addresses
jtagspi driver always used 3-byte addresses regardless of actual
device capcity. Now select 1- to 4-byte addresses depending on
device capacity.
Some devices need a special command to activate the 4-byte address
mode, a special command to accomplish this, and a further command
for setting device properties are added.
Additionally, restriction (start of range had to be page aligned)
removed.
Tested with XCS6SLX16 board and W25Q256FV in 3- and 4-byte address
modes.
Change-Id: I88b2877517a18dac460253ae6d97f3dded054e6c Signed-off-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/4876 Reviewed-by: Jan Matyas <matyas@codasip.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: zapb <dev@zapb.de> Tested-by: jenkins
Antonio Borneo [Sun, 11 Apr 2021 22:04:19 +0000 (00:04 +0200)]
jimtcl: revert temporary workaround for memory leak in jimtcl 0.80
By using jimtcl from latest master branch, the workaround added in
commit 36ae487ed04b ("jimtcl: add temporary workaround for memory
leak in jimtcl 0.80") is not needed anymore.
Antonio Borneo [Sun, 11 Apr 2021 21:58:57 +0000 (23:58 +0200)]
Makefile: remove workaround for jimtcl 0.80
Commit 266a945ad3e8 ("jimtcl: update to version 0.80 (2020-10-29)")
adds a workaround to permit 'make distcheck' with jimtcl 0.80.
This has been fixed in jimtcl with commit d224c9a2b7b2 ("Makefile:
remove examples.api/Makefile while 'distclean'").
By using jimtcl from latest master branch, the workaround is not
required anymore.
Antonio Borneo [Sat, 14 Aug 2021 12:48:50 +0000 (14:48 +0200)]
stlink: skip rw-misc commands with TCP server
The main purpose of TCP server is to allow multiple clients to
connect and share the same physical stlink.
The commands RW MISC don't lock the communication between command
and answer, thus cannot prevent another client to break this
sequence. The commands are not supposed to be used in shared mode.
Prevent the use of RW MISC commands on a (possibly) shared TCP
backend.
This degrades the overall performance, but the shared mode already
adds its own overhead, so this is not really an issue.
Antonio Borneo [Thu, 29 Jul 2021 15:54:31 +0000 (17:54 +0200)]
stlink: add support for rw-misc commands
Firmware versions V2J32 and V3J2 introduce the commands RW-MISC
to put in a single USB packet a sequence of mem_ap read/write.
These commands provide a significant speed improvement while
accessing the debug unit at scattered addresses.
Add the low level commands and extend high level implementation.
Skip for the moment the command to read the max number of items
allowed by the firmware and use some hardcoded values.
Antonio Borneo [Thu, 29 Jul 2021 16:38:20 +0000 (18:38 +0200)]
stlink: dequeue CSW write only if it doesn't change csw_default
The stlink commands for buffer read/write carry the associated CSW
value that has to be used. We can dequeue any CSW write request
and add the CSW in the following buffer read/write.
In preparation to next patch that uses stlink commands misc-rw
(commands that don't handle CSW value), let's dequeue only those
CSW write that don't change csw_default.
Keep a local cache of last csw_default.
Tag the queued CSW writes that change csw_default.
Dequeue only the un-tagged CSW writes.
On buffer read/write commands, limiting the dequeued CSW write
surely adds a performance penalty. But csw_default is not changed
often so the penalty is not significant.
Antonio Borneo [Sun, 25 Jul 2021 21:46:55 +0000 (23:46 +0200)]
stlink: add support for native no_addr_incr commands
Firmware versions V2J26 and V3J1 introduce the command
STLINK_DEBUG_WRITEMEM_32BIT_NO_ADDR_INC
Firmware versions V2J32 and V3J2 introduce the command
STLINK_DEBUG_READMEM_32BIT_NO_ADDR_INC
These new commands can provide speed improvement to Cortex-A
memory download (its debug port use a FIFO for data transfer).
Add the low level commands and extend high level implementation.
Antonio Borneo [Thu, 22 Jul 2021 21:50:33 +0000 (23:50 +0200)]
stlink: detect mem_ap R/W and dequeue set TAR and CSW
By using the stlink commands for memory read write we can gain
some performance, but only when TAR and/or CSW are changed.
During long transfers with constant CSW and TAR auto-incremented
there is no gain, since the same amount of USB/TCP packet is used.
Plus, by dropping ADIv5 packed transfers the performance is lower
on 8 and 16 bits transfers.
This changes opens the opportunity for collapsing memory burst
accesses in a single stlink USB/TCP packet.
Initialize the values of enum queue_cmd to easily extract the word
size through a macro, even if this is not used here.
Antonio Borneo [Wed, 5 Feb 2020 15:20:37 +0000 (16:20 +0100)]
stlink: expose ap number and csw in memory r/w
Recent versions of stlink firmware allow accessing access port
other than zero and setting the CSW.
Modify the internal API to provide ap_num and csw.
There is no interest to modify HLA to use ap_num and csw, so set
and use some backward compatible defaults.
Antonio Borneo [Thu, 22 Jul 2021 13:08:36 +0000 (15:08 +0200)]
stlink: add queue in dap-direct mode
Implement a minimalist queue for DP/AP commands and reorganize the
code to use it.
There is no performance improvement; the queue elements are still
sent one-by-one on USB or on TCP during dap_run().
Antonio Borneo [Sun, 25 Jul 2021 15:51:49 +0000 (17:51 +0200)]
stlink: check buffer size on 16 and 32 bit memory transfer
Both HLA and ADIv5 layers limit the memory transfer within blocks
whose boundaries are aligned at 1024 or 4096 bytes.
New stlink firmware handle the ADIv5 TAR autoincrement, making
possible to send memory transfers across the boundary of 1024 or
4096 byte. OpenOCD doesn't use this feature yet.
Use the correct buffer size in the code, even if it is not used.
While there, split SWIM buffer size from JTAG/SWD case; stlink has
a dedicated command to retrieve SWIM buffer size, but currently
not implemented in OpenOCD.
Jimmy [Thu, 23 Apr 2020 10:58:58 +0000 (18:58 +0800)]
flash/nor/stm32lx: fixed writes at high adapter speeds
The busy flag must be polled after each half-page write.
At low clock speeds, no issue is observed when the poll
is omitted, because the writes complete before the next
write begins. But at high clock speeds the subsequent
writes would overlap and cause the operation to fail.
The status polls are done on the target for efficiency,
since the half-pages are very small.
Change-Id: Ia1e9b4a6a71930549b3d84a902744ce6e596301b Signed-off-by: Jimmy <nhminus@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5598 Tested-by: jenkins Reviewed-by: Jelle De Vleeschouwer Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>
Antonio Borneo [Thu, 7 Oct 2021 10:04:46 +0000 (12:04 +0200)]
jtag/core: remove unused variable
Commit e3f3f60a02ab ("adapter speed: require init script setting
and centralize activation from drivers to core.c") has already
dropped the only use of variable 'jtag_speed'.
Remove the variable.
Change-Id: Iff096df0022982cf90795aa62d6b3406203f7b14 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6638 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tim Newsome [Wed, 1 Sep 2021 22:00:46 +0000 (15:00 -0700)]
Upstream a whole host of RISC-V changes.
Made no attempt to separate this out into reviewable chunks, since this
is all RISC-V-specific code developed at
https://github.com/riscv/riscv-openocd
Memory sample and repeat read functionality was left out of this change
since it requires some target-independent changes that I'll upstream
some other time.
Change-Id: I92917c86d549c232cbf36ffbfefc93331c05accd Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6529 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Wed, 7 Apr 2021 17:21:27 +0000 (19:21 +0200)]
tcl/stm32mp15x: freeze watchdog, recover SWD after power cycle
Freeze the IWDG watchdog when cores are halted to prevent a reset
while debugging.
The PMIC present on some board senses the nsrst and forces a power
cycle to the target. The power cycle causes the SWJ-DP to restart
in JTAG mode. If the debugger is using SWD, the mismatch triggers
an error after the reset command.
Ignore the error detected by 'dap init' and proceed executing the
handler. The error in 'dap init' will force a reconnect during the
following 'dap apid', restoring the SWD functionality.
Change-Id: I04fcda6a5b8a1b080ab4e8890ecd0754d5ed12d9 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6599 Tested-by: jenkins
Antonio Borneo [Sat, 2 Oct 2021 12:22:06 +0000 (14:22 +0200)]
flash/nor/psoc6: fix doxygen comment
Commit 64c2e03b23d9 ("flash/nor: improved API of flash_driver.info
& fixed buffer overruns") changes the prototype of the function
psoc6_get_info() but didn't update the list of parameters in the
doxygen comment.
Fix the doxygen comment.
Change-Id: I1dce018b60d080973c5e351490d4d7baba422d74 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 64c2e03b23d9 ("flash/nor: improved API of flash_driver.info & fixed buffer overruns")
Reviewed-on: https://review.openocd.org/c/openocd/+/6620 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
Antonio Borneo [Wed, 22 Sep 2021 17:21:39 +0000 (19:21 +0200)]
mips64_pracc: fix three dead assignments
Clang scan-build complains for three dead assignments:
Although the value stored to 'data' is used in the
enclosing expression, the value is never actually read
from 'data'
Value stored to 'address' is never read
Remove the useless assignment and the variable 'data'.
Change-Id: Ie8dcb74b1c1aa5eea1acd06b3c45c5b44954c9e7 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6592 Tested-by: jenkins
Antonio Borneo [Wed, 22 Sep 2021 16:51:26 +0000 (18:51 +0200)]
arm_tpiu_swo: fix two dead assignments
Clang scan-build complains for two dead assignments:
Value stored to 'retval' is never read
Since the timer callback should not return error, print an error
message if the data cannot be send out. Add a FIXME comment
because in current code there is no string/name to report which
connection has failed.
In command tpiu enable check the returned value and propagate the
error.
Change-Id: I9a89e4c4f7b677e8222b2df09a31b2478ac9ca4f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6588 Tested-by: jenkins
Antonio Borneo [Wed, 22 Sep 2021 16:39:57 +0000 (18:39 +0200)]
jtag/core: fix unused assignment
Clang scan-build complains about a variable assigned but never
used.
Although the value stored to 'val' is used in the
enclosing expression, the value is never actually read
from 'val'
Remove the dead assignment. While there, reduce the scope of the
variable by declaring the variable at the point of first use.
Change-Id: Ibe2b55a7d70597833cfa7f3d843e7c3d2407f2df Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6587 Tested-by: jenkins
Yasushi SHOJI [Sun, 29 Aug 2021 09:18:01 +0000 (18:18 +0900)]
helper: Remove src/helper from include dirs
The header files under src/helper/ can currently be included with
either
#include <bits.h>
or
#include <helper/bits.h>
This is because we specify both "src/" and "src/helper/" directories
as include directories. Some files name under "src/helper/", such as
types.h, log.h, and util.h are too generic and could be ambiguous
depending on the search path.
This commit remove "src/helper/" from our include dir and make C files
include explicitly.
Tim Newsome [Tue, 21 Sep 2021 18:43:21 +0000 (11:43 -0700)]
uint64_t->target_addr_t for stack pointers.
This might be incomplete. It's just a quick attempt to reduce some of
the difference between riscv-openocd and mainline. Other stack pointers
can be updated as I come across them.
Change-Id: Id3311b8a1bb0667f309a26d36b67093bfeb8380a Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6586 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Tue, 16 Mar 2021 23:02:16 +0000 (00:02 +0100)]
stlink-dap: add 'cmd' to send arbitrary commands
Either for testing new commands and to retrieve information that
don't fit in any specific place of OpenOCD, for example monitoring
the target's VDD power supply from a TCL script.
target: reset target examined flag if target::examine() fails
For example: before this change in cortex_m_examine, if we fail reading CPUID
we return a failure code but target was set to examined which is not consistent.
Giving the example of STM32WL55x the examine log is the following:
Info : stm32wlx.cpu0: hardware has 6 breakpoints, 4 watchpoints
Info : stm32wlx.cpu1: hardware has 4 breakpoints, 2 watchpoints
After this change the examine log becomes:
Info : stm32wlx.cpu0: Cortex-M4 r0p1 processor detected
Info : stm32wlx.cpu0: target has 6 breakpoints, 4 watchpoints
Info : stm32wlx.cpu1: Cortex-M0+ r0p1 processor detected
Info : stm32wlx.cpu1: target has 4 breakpoints, 2 watchpoints
Change-Id: I1873a75eb76f0819342c441129427b38e984f0df Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6553 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Alex Crawford [Thu, 16 Sep 2021 17:00:25 +0000 (10:00 -0700)]
driver/linuxgpiod: add support for opendrain srst
Some MCUs (e.g. the STM32F3) directly expose the internal reset line to
an external pin. When this signal is driven by a push/pull line, it can
actually be inhibited by the external driver. This results in a setup
where the MCU cannot reset itself, for example, by a watchdog timeout or
a sysreset request. To fix this condition, support for open drain output
on the SRST line is required.
Note that because `reset_config srst_open_drain` is the default, all
users of this adapter will switch over to an open drain output unless
explicitly configured otherwise.
Signed-off-by: Alex Crawford <openocd@code.acrawford.com>
Change-Id: I89b39b03aa03f826ed3c45793412780448940bcc
Reviewed-on: https://review.openocd.org/c/openocd/+/6559 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tim Newsome [Thu, 2 Sep 2021 18:11:30 +0000 (11:11 -0700)]
Speed up remote bitbang.
1. Use TCP_NODELAY, which makes things twice as fast.
2. Get rid of a bunch of unnecessary socket block/non-block calls, which
improves speed another 10% or so.
Change-Id: I415db5746d55374a14564b1973b81e3517f5cb67 Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6534 Tested-by: jenkins Reviewed-by: Jan Matyas <matyas@codasip.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Antonio Borneo [Fri, 17 Sep 2021 16:37:41 +0000 (18:37 +0200)]
openocd: prevent jimtcl error message while testing commands
The jimtcl API Jim_GetCommand() sets an error message when the
command is not found and flag JIM_ERRMSG is set.
OpenOCD is checking if the command has already been registered,
thus 'command not found' is the desired case.
Pass flag JIM_NONE to prevent jimtcl from setting the error
message.
Change-Id: I3329c2f8722eda0cc9a5f9cbd888a37915b46107 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6562 Tested-by: jenkins
Antonio Borneo [Fri, 17 Sep 2021 16:47:20 +0000 (18:47 +0200)]
arm_tpiu_swo: fix support for deprecated 'tpiu' command before 'init'
Commit dc7b32ea4a00 ("armv7m_trace: get rid of the old tpiu code")
is not handling correctly the old 'tpiu' command if it is run
during the config phase (before command 'init').
Move the call to the old event handler 'trace-config' in function
jim_arm_tpiu_swo_enable(), so it is correctly executed after
'init'.
Add the call to the old event handler 'trace-config' also during
jim_arm_tpiu_swo_disable(), to match the old behaviour.
Add more information while alerting that the event 'trace-config'
is deprecated.
Change-Id: If831d9159b4634c74e19c04099d041a6e2be3f2a Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: dc7b32ea4a00 ("armv7m_trace: get rid of the old tpiu code")
Reviewed-on: https://review.openocd.org/c/openocd/+/6561 Tested-by: jenkins Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Antonio Borneo [Fri, 20 Aug 2021 22:35:32 +0000 (00:35 +0200)]
arm_adi_v5: drop ANY_ID from table dap_part_nums
The initial version of the table dap_part_nums contains only the
part number of the device and not the manufacturer ID.
This causes collisions between devices with same part number but
from different manufacturer.
The table has been extended to include the manufacturer JEDEC code
in commit 2f131d3c3004 ("ARM ADIv5: CoreSight ROM decode part
number and designer id").
For two old/legacy table's entries reported without manufacturer
code it was defined a special ANY_ID manufacturer, meaning skip
the check for manufacturer!
The two legacy entries report the comment "from OMAP3 memmap", and
thanks to the associated string has been possible through Google
to identify a Master Report [1] about using OpenOCD with the OMAP3
in a BeagleBoard. The ROM table is printed with OpenOCD command
"dap info 1" at page 8 and reports the Peripheral ID required to
extract the manufacturer ID that, out of any surprise, belong to
Texas Instruments.
Set the two missing manufacturer ID to Texas Instruments JEDEC
code.
Remove the now redundant definition and use of ANY_ID.
While revisiting this old code, remove also the useless comment
"0x113: what?". It was introduced in commit ddade10d4a93 ("ARM
ADIv5: "dap info" gets more readable") and from the same dump in
[1] it's clearly another element in OMAP3. It is listed as entry
0x8 in the ROM table and there is no further info available.
OpenOCD will anyway list it as:
Designer is 0x017, Texas Instruments
Part is 0x113, Unrecognized
Another link https://elinux.org/BeagleBoardOpenOCD reports the
text "Part number 0x113: This is ????", which sounds familiar!
No public document from Texas Instruments reports what is this
device at address 0x54012000.
[1] Warren Clay Grant - University of Texas at Austin
"Implementation of an Open Source JTAG Debugging Development
Chain for the BeagleBoard ARM® Cortex A-8" - May 2012 Link: https://repositories.lib.utexas.edu/bitstream/handle/2152/ETD-UT-2012-05-5478/GRANT-MASTERS-REPORT.pdf
Change-Id: I7e007addbb5c6e90303e4e8c110c7d27810fbe9c Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6454 Tested-by: jenkins Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Antonio Borneo [Tue, 10 Aug 2021 16:09:28 +0000 (18:09 +0200)]
arm_adi_v5: simplify handling of AP type
The complete AP type should include 'class' and 'manufacturer'.
Cleanup the definition of AP type from AP_REG_IDR register.
Include the check of 'class', together with manufacturer and type.
Add the new MEM-AP from ARM IHI0074C.
Change-Id: Ic8db7c040108ba237b54f73b1abe24b8b853699b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6447 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Antonio Borneo [Mon, 16 Aug 2021 17:08:23 +0000 (19:08 +0200)]
armv7m.h: relax dependency from 'arm_adi_v5.h'
The include file 'armv7m.h' includes 'arm_adi_v5.h' only to get
the definition of 'struct adiv5_ap', but doesn't need the struct
content.
Reducing the cross dependencies speeds-up the compile time during
code development by avoiding re-compiling file.
Relax the dependency by locally declaring 'struct adiv5_ap' in
'armv7m.h' and remove the include of 'arm_adi_v5.h'.
Fix the other files that have now lost the includes file that
'arm_adi_v5.h' depends from.
Change-Id: Ic0d40b17db6045fa43f348bda83eaf211a6b347d Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6468 Tested-by: jenkins Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tarek BOCHKATI [Wed, 11 Aug 2021 00:14:21 +0000 (01:14 +0100)]
helper/command: fix echo return values
the echo command is managed through command handler and not jim_handler
to be consistent rename the handler from jim_echo to handle_echo
and update the return values
We are already at the limit for the number of VID/PID pairs declared
in stlink.cfg and stlink-dap.cfg. Increase the maximum number of pairs
from 8 to 16 to make room for a few more devices.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Change-Id: Ifad8e7ef67b930edbb5421730f00eb3390812f06
Reviewed-on: https://review.openocd.org/c/openocd/+/6554 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
flash/stm32l4x: fix flash programming in 64-bit hosts
stm32l4_work_area struct is shared between the loader and stm32l4x flash driver
'*wp' and '*rp' pointers' size is 4 bytes each since stm32l4x devices have
32-bit processors.
however when used in openocd code, their size depends on the host
if the host is 32-bit, then the size is 4 bytes each.
if the host is 64-bit, then the size is 8 bytes each.
to avoid this size difference, change their types depending on the
usage (pointers for the loader, and 32-bit integers in openocd code).
Change-Id: I0a3df4bb4bf872b01cdb9357eb28307868d7d469 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6556 Tested-by: jenkins Reviewed-by: Yestin Sun <sunyi0804@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tarek BOCHKATI [Sun, 29 Aug 2021 15:33:55 +0000 (16:33 +0100)]
flash/stm32l4x: fix segmentation fault with HLA adapters and STM32WLx devices
CPU2 (Cortex-M0+) is supported only with non-hla adapters because it is on AP1.
Using HLA adapters armv7m.debug_ap is null, and checking ap_num triggers
a segfault.
flash/nor/tcl: fix the flash name returned by 'flash list' command
The 'flash list' command returns the driver name as flash name which seems
to be incorrect, the proposal is:
- to fix this by returning the flash name
- and add a new item 'driver' in the returned list
example:
before the change
> flash list
{name stm32l4x base 134217728 size 0 bus_width 0 chip_width 0}
{name stm32l4x base 201326592 size 0 bus_width 0 chip_width 0}
{name stm32l4x base 200933376 size 0 bus_width 0 chip_width 0}
after the change
> flash list
{name stm32l5x.flash_ns driver stm32l4x ...}
{name stm32l5x.flash_alias_s driver stm32l4x ...}
{name stm32l5x.otp driver stm32l4x ...}
This version of jimtcl:
- fixes memory leak in API Jim_CreateCommand();
- fixes 'make distcheck';
- uses single-argument syntax for 'expr'.
With the 'expr' syntax already fixed in all the tcl scripts in
OpenOCD, let's use the latest jimtcl to check it and anticipate
any further issues.
By using this version, the workaround for the memory leak and for
distcheck can be reverted.
Antonio Borneo [Sun, 29 Aug 2021 23:01:40 +0000 (01:01 +0200)]
openocd: prepare for jimtcl 0.81 'expr' syntax change
Jimtcl commit 1843b79a03dd ("expr: TIP 526, only support a single
arg") drops the support for multi-argument syntax for the TCL
command 'expr'.
All the scripts distributed with OpenOCD are already compliant
with the new syntax.
To avoid breaking user script, introduce a replacement for 'expr'
command that handles the old syntax while issuing a deprecated
warning.
This change should be part of OpenOCD v0.12.0, then reverted.
Tarek BOCHKATI [Fri, 26 Mar 2021 14:07:41 +0000 (15:07 +0100)]
flash/stm32l4x: add support of STM32WB1x
STM32WB1x devices has a single flash bank up to 320 KB (page 2KB)
note: STM32WB5x/WB3x are single banks as well but do have 4KB as page size.
note: remove the assert that checks if max_mages is power of two, because
STM32WB1x flash size is not a power of 2
projects / fw / openocd / log