#define AO_HCLK (AO_SYSCLK / AO_AHB_PRESCALER)
#define AO_PCLK1 (AO_HCLK / AO_APB1_PRESCALER)
#define AO_PCLK2 (AO_HCLK / AO_APB2_PRESCALER)
+#define AO_SYSTICK (AO_HCLK / 8)
#if AO_APB1_PRESCALER == 1
#define AO_TIM23467_CLK AO_PCLK1
volatile __data uint8_t ao_data_count;
#endif
-void
-ao_debug_out(char c);
-
-
-void stm_tim6_isr(void)
+void stm_systick_isr(void)
{
- if (stm_tim6.sr & (1 << STM_TIM67_SR_UIF)) {
- stm_tim6.sr = 0;
+ if (stm_systick.csr & (1 << STM_SYSTICK_CSR_COUNTFLAG)) {
++ao_tick_count;
#if HAS_TASK_QUEUE
if (ao_task_alarm_tick && (int16_t) (ao_tick_count - ao_task_alarm_tick) >= 0)
#define TIMER_10kHz ((AO_PCLK1 * TIMER_23467_SCALER) / 10000)
+#define SYSTICK_RELOAD (AO_SYSTICK / 100 - 1)
+
void
ao_timer_init(void)
{
- stm_nvic_set_enable(STM_ISR_TIM6_POS);
- stm_nvic_set_priority(STM_ISR_TIM6_POS, AO_STM_NVIC_CLOCK_PRIORITY);
-
- /* Turn on timer 6 */
- stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_TIM6EN);
-
- stm_tim6.psc = TIMER_10kHz;
- stm_tim6.arr = 99;
- stm_tim6.cnt = 0;
-
- /* Enable update interrupt */
- stm_tim6.dier = (1 << STM_TIM67_DIER_UIE);
-
- /* Poke timer to reload values */
- stm_tim6.egr |= (1 << STM_TIM67_EGR_UG);
-
- stm_tim6.cr2 = (STM_TIM67_CR2_MMS_RESET << STM_TIM67_CR2_MMS);
-
- /* And turn it on */
- stm_tim6.cr1 = ((0 << STM_TIM67_CR1_ARPE) |
- (0 << STM_TIM67_CR1_OPM) |
- (1 << STM_TIM67_CR1_URS) |
- (0 << STM_TIM67_CR1_UDIS) |
- (1 << STM_TIM67_CR1_CEN));
+ stm_systick.rvr = SYSTICK_RELOAD;
+ stm_systick.cvr = 0;
+ stm_systick.csr = ((1 << STM_SYSTICK_CSR_ENABLE) |
+ (1 << STM_SYSTICK_CSR_TICKINT) |
+ (STM_SYSTICK_CSR_CLKSOURCE_HCLK_8 << STM_SYSTICK_CSR_CLKSOURCE));
}
void
#define STM_LCD_CLR_UDDC (3)
#define STM_LCD_CLR_SOFC (1)
+/* The SYSTICK starts at 0xe000e010 */
+
+struct stm_systick {
+ vuint32_t csr;
+ vuint32_t rvr;
+ vuint32_t cvr;
+ vuint32_t calib;
+};
+
+extern struct stm_systick stm_systick;
+
+#define STM_SYSTICK_CSR_ENABLE 0
+#define STM_SYSTICK_CSR_TICKINT 1
+#define STM_SYSTICK_CSR_CLKSOURCE 2
+#define STM_SYSTICK_CSR_CLKSOURCE_HCLK_8 0
+#define STM_SYSTICK_CSR_CLKSOURCE_HCLK 1
+#define STM_SYSTICK_CSR_COUNTFLAG 16
+
/* The NVIC starts at 0xe000e100, so add that to the offsets to find the absolute address */
struct stm_nvic {