flash/nor/efm32: Use Cortex-M 'core_info' field

[fw/openocd] / src / target / riscv / riscv.h

diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h
index d0f4f6ec048bbd5e2b2130680954bbaadd60ad95..0ae8945daa9e1a1abf8ad36dac253616dfee4a01 100644 (file)
--- a/src/target/riscv/riscv.h
+++ b/src/target/riscv/riscv.h
@@ -96,11 +96,6 @@ typedef struct {
         * every function than an actual */
        int current_hartid;
 
-       /* OpenOCD's register cache points into here. This is not per-hart because
-        * we just invalidate the entire cache when we change which hart is
-        * selected. Use an array of 8 uint8_t per register. */
-       uint8_t reg_cache_values[RISCV_MAX_REGISTERS][8];
-
        /* Single buffer that contains all register names, instead of calling
         * malloc for each register. Needs to be freed when reg_list is freed. */
        char *reg_names;