target/riscv: fix 'reset run' after 'reset halt'
[fw/openocd] / src / target / mips_m4k.h
index 4fe14a0d67b128f9e0a213494861a5bfb674bd0d..ea09ae527ffc8d1892c0655e506c3987aa76902d 100644 (file)
@@ -4,6 +4,9 @@
  *                                                                         *
  *   Copyright (C) 2008 by David T.L. Wong                                 *
  *                                                                         *
+ *   Copyright (C) 2011 by Drasko DRASKOVIC                                *
+ *   drasko.draskovic@gmail.com                                            *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
-#ifndef MIPS_M4K_H
-#define MIPS_M4K_H
-
-#include <helper/types.h>
+#ifndef OPENOCD_TARGET_MIPS_M4K_H
+#define OPENOCD_TARGET_MIPS_M4K_H
 
 struct target;
 
 #define MIPSM4K_COMMON_MAGIC   0xB321B321
 
-struct mips_m4k_common
-{
-       int common_magic;
-       struct mips32_common mips32_common;
+struct mips_m4k_common {
+       uint32_t common_magic;
+       bool is_pic32mx;
+       struct mips32_common mips32;
 };
 
 static inline struct mips_m4k_common *
 target_to_m4k(struct target *target)
 {
        return container_of(target->arch_info,
-                       struct mips_m4k_common, mips32_common);
+                       struct mips_m4k_common, mips32);
 }
 
-int mips_m4k_bulk_write_memory(struct target *target,
-               uint32_t address, uint32_t count, uint8_t *buffer);
-
-void mips_m4k_enable_breakpoints(struct target *target);
-int mips_m4k_set_breakpoint(struct target *target, struct breakpoint *bp);
-int mips_m4k_unset_breakpoint(struct target *target, struct breakpoint *bp);
-int mips_m4k_add_breakpoint(struct target *target, struct breakpoint *bp);
-int mips_m4k_remove_breakpoint(struct target *target, struct breakpoint *bp);
-
-void mips_m4k_enable_watchpoints(struct target *target);
-int mips_m4k_set_watchpoint(struct target *target, struct watchpoint *wp);
-int mips_m4k_unset_watchpoint(struct target *target, struct watchpoint *wp);
-int mips_m4k_add_watchpoint(struct target *target, struct watchpoint *wp);
-int mips_m4k_remove_watchpoint(struct target *target, struct watchpoint *wp);
+static inline void mips_m4k_isa_filter(enum mips32_isa_imp isa_imp, target_addr_t  *addr)
+{
+       if (isa_imp <= 1) {     /* if only one isa implemented */
+               target_addr_t address = (*addr & ~1) | isa_imp;
+
+               if (address != *addr) {
+                       LOG_USER("Warning: isa bit changed due to isa not implemented");
+                       *addr = address;
+               }
+       }
+}
+extern const struct command_registration mips_m4k_command_handlers[];
 
-#endif /*MIPS_M4K_H*/
+#endif /* OPENOCD_TARGET_MIPS_M4K_H */