flash/nor/efm32: Use Cortex-M 'core_info' field

[fw/openocd] / src / target / mips32_pracc.h

diff --git a/src/target/mips32_pracc.h b/src/target/mips32_pracc.h
index e31ba63e29540e000c6745d483a83e1cfdb3c9ba..30edaec0a28a91806e954c544f54c8b55fca5e32 100644 (file)
--- a/src/target/mips32_pracc.h
+++ b/src/target/mips32_pracc.h
@@ -47,10 +47,10 @@
 
 #define PRACC_BLOCK    128     /* 1 Kbyte */
 
-typedef struct {
+struct pa_list {
        uint32_t instr;
        uint32_t addr;
-} pa_list;
+};
 
 struct pracc_queue_info {
        struct mips_ejtag *ejtag_info;
@@ -58,8 +58,8 @@ struct pracc_queue_info {
        int retval;
        int code_count;
        int store_count;
-       int max_code;           /* max intstructions with currently allocated memory */
-       pa_list *pracc_list;    /* Code and store addresses at dmseg */
+       int max_code;           /* max instructions with currently allocated memory */
+       struct pa_list *pracc_list;     /* Code and store addresses at dmseg */
 };
 
 void pracc_queue_init(struct pracc_queue_info *ctx);
@@ -93,7 +93,7 @@ int mips32_pracc_exec(struct mips_ejtag *ejtag_info, struct pracc_queue_info *ct
  * @param[in] cp0_reg Number of copro C0 register we want to read
  * @param[in] cp0_sel Select for the given C0 register
  *
- * @return ERROR_OK on Sucess, ERROR_FAIL otherwise
+ * @return ERROR_OK on Success, ERROR_FAIL otherwise
  */
 int mips32_cp0_read(struct mips_ejtag *ejtag_info,
                uint32_t *val, uint32_t cp0_reg, uint32_t cp0_sel);
@@ -109,7 +109,7 @@ int mips32_cp0_read(struct mips_ejtag *ejtag_info,
  * @param[in] cp0_reg Number of copro C0 register we want to write to
  * @param[in] cp0_sel Select for the given C0 register
  *
- * @return ERROR_OK on Sucess, ERROR_FAIL otherwise
+ * @return ERROR_OK on Success, ERROR_FAIL otherwise
  */
 int mips32_cp0_write(struct mips_ejtag *ejtag_info,
                uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel);