target/armv7m: change FPv4_SP and FPv5_SP/DP identifiers to uppercase

[fw/openocd] / src / target / cortex_m.c

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index b998b7ac76ae38f963c39593d56d3c4e7bb2a27f..e7a2fadda744ce30d6c6207eb4fcb0091da695ff 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -521,7 +521,7 @@ static int cortex_m_debug_entry(struct target *target)
 
        for (i = 0; i < num_regs; i++) {
                r = &armv7m->arm.core_cache->reg_list[i];
-               if (!r->valid)
+               if (r->exist && !r->valid)
                        arm->read_core_reg(target, r, i, ARM_MODE_ANY);
        }
 
@@ -2019,7 +2019,7 @@ int cortex_m_examine(struct target *target)
                        /* test for floating point feature on Cortex-M4 */
                        if ((mvfr0 == MVFR0_DEFAULT_M4) && (mvfr1 == MVFR1_DEFAULT_M4)) {
                                LOG_DEBUG("Cortex-M%d floating point feature FPv4_SP found", i);
-                               armv7m->fp_feature = FPv4_SP;
+                               armv7m->fp_feature = FPV4_SP;
                        }
                } else if (i == 7 || i == 33 || i == 35 || i == 55) {
                        target_read_u32(target, MVFR0, &mvfr0);
@@ -2028,10 +2028,10 @@ int cortex_m_examine(struct target *target)
                        /* test for floating point features on Cortex-M7 */
                        if ((mvfr0 == MVFR0_DEFAULT_M7_SP) && (mvfr1 == MVFR1_DEFAULT_M7_SP)) {
                                LOG_DEBUG("Cortex-M%d floating point feature FPv5_SP found", i);
-                               armv7m->fp_feature = FPv5_SP;
+                               armv7m->fp_feature = FPV5_SP;
                        } else if ((mvfr0 == MVFR0_DEFAULT_M7_DP) && (mvfr1 == MVFR1_DEFAULT_M7_DP)) {
                                LOG_DEBUG("Cortex-M%d floating point feature FPv5_DP found", i);
-                               armv7m->fp_feature = FPv5_DP;
+                               armv7m->fp_feature = FPV5_DP;
                        }
                } else if (i == 0) {
                        /* Cortex-M0 does not support unaligned memory access */
@@ -2501,7 +2501,6 @@ static const struct command_registration cortex_m_command_handlers[] = {
 
 struct target_type cortexm_target = {
        .name = "cortex_m",
-       .deprecated_name = "cortex_m3",
 
        .poll = cortex_m_poll,
        .arch_state = armv7m_arch_state,