#endif
#include "breakpoints.h"
-#include "target.h"
#include "armv7m.h"
#include "algorithm.h"
#include "register.h"
"DebugMonitor", "RESERVED", "PendSV", "SysTick"
};
-/* FIXME these dummies are IDENTICAL to the armv4_5, arm11, and armv7a
- * ones... except for naming/scoping
- */
-static uint8_t armv7m_gdb_dummy_fp_value[12];
-
-static struct reg armv7m_gdb_dummy_fp_reg =
-{
- .name = "GDB dummy floating-point register",
- .value = armv7m_gdb_dummy_fp_value,
- .dirty = 0,
- .valid = 1,
- .size = 96,
- .arch_info = NULL,
- .arch_type = 0,
-};
-
-static uint8_t armv7m_gdb_dummy_fps_value[4];
-
-static struct reg armv7m_gdb_dummy_fps_reg =
-{
- .name = "GDB dummy floating-point status register",
- .value = armv7m_gdb_dummy_fps_value,
- .dirty = 0,
- .valid = 1,
- .size = 32,
- .arch_info = NULL,
- .arch_type = 0,
-};
-
#ifdef ARMV7_GDB_HACKS
uint8_t armv7m_gdb_dummy_cpsr_value[] = {0, 0, 0, 0};
.valid = 1,
.size = 32,
.arch_info = NULL,
- .arch_type = 0,
};
#endif
#define ARMV7M_NUM_REGS ARRAY_SIZE(armv7m_regs)
-static int armv7m_core_reg_arch_type = -1;
-
/**
* Restores target context using the cache of core registers set up
* by armv7m_build_reg_cache(), calling optional core-specific hooks.
return ERROR_OK;
}
-/** Invalidates cache of core registers set up by armv7m_build_reg_cache(). */
-int armv7m_invalidate_core_regs(struct target *target)
-{
- struct armv7m_common *armv7m = target_to_armv7m(target);
- int i;
-
- for (i = 0; i < armv7m->core_cache->num_regs; i++)
- {
- armv7m->core_cache->reg_list[i].valid = 0;
- armv7m->core_cache->reg_list[i].dirty = 0;
- }
-
- return ERROR_OK;
-}
-
/**
* Returns generic ARM userspace registers to GDB.
* GDB doesn't quite understand that most ARMs don't have floating point
}
for (i = 16; i < 24; i++)
- {
- (*reg_list)[i] = &armv7m_gdb_dummy_fp_reg;
- }
-
- (*reg_list)[24] = &armv7m_gdb_dummy_fps_reg;
+ (*reg_list)[i] = &arm_gdb_dummy_fp_reg;
+ (*reg_list)[24] = &arm_gdb_dummy_fps_reg;
#ifdef ARMV7_GDB_HACKS
/* use dummy cpsr reg otherwise gdb may try and set the thumb bit */
if (!reg)
{
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
- exit(-1);
+ return ERROR_INVALID_ARGUMENTS;
}
if (reg->size != reg_params[i].size)
{
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
- exit(-1);
+ return ERROR_INVALID_ARGUMENTS;
}
// regvalue = buf_get_u32(reg_params[i].value, 0, 32);
if (!reg)
{
LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name);
- exit(-1);
+ return ERROR_INVALID_ARGUMENTS;
}
if (reg->size != reg_params[i].size)
{
LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name);
- exit(-1);
+ return ERROR_INVALID_ARGUMENTS;
}
buf_set_u32(reg_params[i].value, 0, 32, buf_get_u32(reg->value, 0, 32));
return ERROR_OK;
}
+static const struct reg_arch_type armv7m_reg_type = {
+ .get = armv7m_get_core_reg,
+ .set = armv7m_set_core_reg,
+};
/** Builds cache of architecturally defined registers. */
struct reg_cache *armv7m_build_reg_cache(struct target *target)
struct armv7m_core_reg *arch_info = calloc(num_regs, sizeof(struct armv7m_core_reg));
int i;
- if (armv7m_core_reg_arch_type == -1)
- {
- armv7m_core_reg_arch_type = register_reg_arch_type(armv7m_get_core_reg, armv7m_set_core_reg);
- }
-
- register_init_dummy(&armv7m_gdb_dummy_fps_reg);
#ifdef ARMV7_GDB_HACKS
register_init_dummy(&armv7m_gdb_dummy_cpsr_reg);
#endif
- register_init_dummy(&armv7m_gdb_dummy_fp_reg);
/* Build the process context cache */
cache->name = "arm v7m registers";
reg_list[i].value = calloc(1, 4);
reg_list[i].dirty = 0;
reg_list[i].valid = 0;
- reg_list[i].arch_type = armv7m_core_reg_arch_type;
+ reg_list[i].type = &armv7m_reg_type;
reg_list[i].arch_info = &arch_info[i];
}
*/
COMMAND_HANDLER(handle_dap_baseaddr_command)
{
- struct target *target = get_current_target(cmd_ctx);
+ struct target *target = get_current_target(CMD_CTX);
struct armv7m_common *armv7m = target_to_armv7m(target);
struct swjdp_common *swjdp = &armv7m->swjdp_info;
uint32_t apsel, apselsave, baseaddr;
int retval;
apselsave = swjdp->apsel;
- switch (argc) {
+ switch (CMD_ARGC) {
case 0:
apsel = swjdp->apsel;
break;
case 1:
- COMMAND_PARSE_NUMBER(u32, args[0], apsel);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
break;
default:
return ERROR_COMMAND_SYNTAX_ERROR;
dap_ap_read_reg_u32(swjdp, 0xF8, &baseaddr);
retval = swjdp_transaction_endcheck(swjdp);
- command_print(cmd_ctx, "0x%8.8" PRIx32 "", baseaddr);
+ command_print(CMD_CTX, "0x%8.8" PRIx32 "", baseaddr);
if (apselsave != apsel)
dap_ap_select(swjdp, apselsave);
*/
COMMAND_HANDLER(handle_dap_apid_command)
{
- struct target *target = get_current_target(cmd_ctx);
+ struct target *target = get_current_target(CMD_CTX);
struct armv7m_common *armv7m = target_to_armv7m(target);
struct swjdp_common *swjdp = &armv7m->swjdp_info;
COMMAND_HANDLER(handle_dap_apsel_command)
{
- struct target *target = get_current_target(cmd_ctx);
+ struct target *target = get_current_target(CMD_CTX);
struct armv7m_common *armv7m = target_to_armv7m(target);
struct swjdp_common *swjdp = &armv7m->swjdp_info;
COMMAND_HANDLER(handle_dap_memaccess_command)
{
- struct target *target = get_current_target(cmd_ctx);
+ struct target *target = get_current_target(CMD_CTX);
struct armv7m_common *armv7m = target_to_armv7m(target);
struct swjdp_common *swjdp = &armv7m->swjdp_info;
COMMAND_HANDLER(handle_dap_info_command)
{
- struct target *target = get_current_target(cmd_ctx);
+ struct target *target = get_current_target(CMD_CTX);
struct armv7m_common *armv7m = target_to_armv7m(target);
struct swjdp_common *swjdp = &armv7m->swjdp_info;
uint32_t apsel;
- switch (argc) {
+ switch (CMD_ARGC) {
case 0:
apsel = swjdp->apsel;
break;
case 1:
- COMMAND_PARSE_NUMBER(u32, args[0], apsel);
+ COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
break;
default:
return ERROR_COMMAND_SYNTAX_ERROR;
}
- return dap_info_command(cmd_ctx, swjdp, apsel);
+ return dap_info_command(CMD_CTX, swjdp, apsel);
}
/** Registers commands used to access DAP resources. */
{
struct command *arm_adi_v5_dap_cmd;
- arm_adi_v5_dap_cmd = register_command(cmd_ctx, NULL, "dap",
+ arm_adi_v5_dap_cmd = COMMAND_REGISTER(cmd_ctx, NULL, "dap",
NULL, COMMAND_ANY,
"cortex dap specific commands");
- register_command(cmd_ctx, arm_adi_v5_dap_cmd, "info",
+ COMMAND_REGISTER(cmd_ctx, arm_adi_v5_dap_cmd, "info",
handle_dap_info_command, COMMAND_EXEC,
"Displays dap info for ap [num],"
"default currently selected AP");
- register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apsel",
+ COMMAND_REGISTER(cmd_ctx, arm_adi_v5_dap_cmd, "apsel",
handle_dap_apsel_command, COMMAND_EXEC,
"Select a different AP [num] (default 0)");
- register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apid",
+ COMMAND_REGISTER(cmd_ctx, arm_adi_v5_dap_cmd, "apid",
handle_dap_apid_command, COMMAND_EXEC,
"Displays id reg from AP [num], "
"default currently selected AP");
- register_command(cmd_ctx, arm_adi_v5_dap_cmd, "baseaddr",
+ COMMAND_REGISTER(cmd_ctx, arm_adi_v5_dap_cmd, "baseaddr",
handle_dap_baseaddr_command, COMMAND_EXEC,
"Displays debug base address from AP [num],"
"default currently selected AP");
- register_command(cmd_ctx, arm_adi_v5_dap_cmd, "memaccess",
+ COMMAND_REGISTER(cmd_ctx, arm_adi_v5_dap_cmd, "memaccess",
handle_dap_memaccess_command, COMMAND_EXEC,
"set/get number of extra tck for mem-ap "
"memory bus access [0-255]");
projects / fw / openocd / blobdiff