flash/stm32l4x: fix segmentation fault with HLA adapters and STM32WLx devices

[fw/openocd] / src / target / armv7a_mmu.c

diff --git a/src/target/armv7a_mmu.c b/src/target/armv7a_mmu.c
index aa3dc16d86b40aed591b6a4356818d003fcef4df..98a0065083e7fd93338b5ae933f0acb86ad5ccb4 100644 (file)
--- a/src/target/armv7a_mmu.c
+++ b/src/target/armv7a_mmu.c
@@ -42,7 +42,7 @@ int armv7a_mmu_translate_va_pa(struct target *target, uint32_t va,
        struct armv7a_common *armv7a = target_to_armv7a(target);
        struct arm_dpm *dpm = armv7a->arm.dpm;
        uint32_t virt = va & ~0xfff, value;
-       uint32_t NOS, NS, INNER, OUTER;
+       uint32_t NOS, NS, INNER, OUTER, SS;
        *val = 0xdeadbeef;
        retval = dpm->prepare(dpm);
        if (retval != ERROR_OK)
@@ -59,19 +59,30 @@ int armv7a_mmu_translate_va_pa(struct target *target, uint32_t va,
                        &value);
        if (retval != ERROR_OK)
                goto done;
-       *val = value;
-       /* decode memory attribute */
-       NOS = (*val >> 10) & 1; /*  Not Outer shareable */
-       NS = (*val >> 9) & 1;   /* Non secure */
-       INNER = (*val >> 4) &  0x7;
-       OUTER = (*val >> 2) & 0x3;
 
-       *val = (*val & ~0xfff)  +  (va & 0xfff);
+       /* decode memory attribute */
+       SS = (value >> 1) & 1;
+       NOS = (value >> 10) & 1;        /*  Not Outer shareable */
+       NS = (value >> 9) & 1;  /* Non secure */
+       INNER = (value >> 4) &  0x7;
+       OUTER = (value >> 2) & 0x3;
+
+       if (SS) {
+               /* PAR[31:24] contains PA[31:24] */
+               *val = value & 0xff000000;
+               /* PAR [23:16] contains PA[39:32] */
+               *val |= (target_addr_t)(value & 0x00ff0000) << 16;
+               /* PA[23:12] is the same as VA[23:12] */
+               *val |= (va & 0xffffff);
+       } else {
+               *val = (value & ~0xfff)  +  (va & 0xfff);
+       }
        if (meminfo) {
-               LOG_INFO("%" PRIx32 " : %" TARGET_PRIxADDR " %s outer shareable %s secured",
+               LOG_INFO("%" PRIx32 " : %" TARGET_PRIxADDR " %s outer shareable %s secured %s super section",
                        va, *val,
                        NOS == 1 ? "not" : " ",
-                       NS == 1 ? "not" : "");
+                       NS == 1 ? "not" : "",
+                       SS == 0 ? "not" : "");
                switch (OUTER) {
                        case 0:
                                LOG_INFO("outer: Non-Cacheable");
@@ -234,7 +245,7 @@ COMMAND_HANDLER(armv7a_mmu_dump_table)
        LOG_USER("Page Directory at (phys): %8.8" TARGET_PRIxADDR, ttb);
 
        first_lvl_ptbl = malloc(sizeof(uint32_t)*(max_pt_idx+1));
-       if (first_lvl_ptbl == NULL)
+       if (!first_lvl_ptbl)
                return ERROR_FAIL;
 
        /*
@@ -255,7 +266,7 @@ COMMAND_HANDLER(armv7a_mmu_dump_table)
                uint32_t first_lvl_descriptor = target_buffer_get_u32(target,
                                                (uint8_t *)&first_lvl_ptbl[pt_idx]);
 
-               LOG_DEBUG("L1 desc[%8.8"PRIx32"]: %8.8"PRIx32, pt_idx << 20, first_lvl_descriptor);
+               LOG_DEBUG("L1 desc[%8.8x]: %8.8"PRIx32, pt_idx << 20, first_lvl_descriptor);
 
                /* skip empty entries in the first level table */
                if ((first_lvl_descriptor & 3) == 0) {