use COMMAND_REGISTER macro

[fw/openocd] / src / target / arm720t.c

diff --git a/src/target/arm720t.c b/src/target/arm720t.c
index a0cde5d4f2d3b71e2ab6c35af06d374761a69731..4ca80e1941fa5c0d24db35de1488c3e5be2e598d 100644 (file)
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -225,7 +225,7 @@ static int arm720t_verify_pointer(struct command_context *cmd_ctx,
 static int arm720t_arch_state(struct target *target)
 {
        struct arm720t_common *arm720t = target_to_arm720(target);
-       struct armv4_5_common_s *armv4_5;
+       struct arm *armv4_5;
 
        static const char *state[] =
        {
@@ -239,8 +239,8 @@ static int arm720t_arch_state(struct target *target)
                        "MMU: %s, Cache: %s",
                         armv4_5_state_strings[armv4_5->core_state],
                         Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name ,
-                        armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)],
-                        buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32),
+                        arm_mode_name(armv4_5->core_mode),
+                        buf_get_u32(armv4_5->cpsr->value, 0, 32),
                         buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
                         state[arm720t->armv4_5_mmu.mmu_enabled],
                         state[arm720t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled]);
@@ -307,7 +307,7 @@ static int arm720t_soft_reset_halt(struct target *target)
        struct arm720t_common *arm720t = target_to_arm720(target);
        struct reg *dbg_stat = &arm720t->arm7_9_common
                        .eice_cache->reg_list[EICE_DBG_STAT];
-       struct armv4_5_common_s *armv4_5 = &arm720t->arm7_9_common
+       struct arm *armv4_5 = &arm720t->arm7_9_common
                        .armv4_5_common;
 
        if ((retval = target_halt(target)) != ERROR_OK)
@@ -347,18 +347,19 @@ static int arm720t_soft_reset_halt(struct target *target)
        target->state = TARGET_HALTED;
 
        /* SVC, ARM state, IRQ and FIQ disabled */
-       buf_set_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 8, 0xd3);
-       armv4_5->core_cache->reg_list[ARMV4_5_CPSR].dirty = 1;
-       armv4_5->core_cache->reg_list[ARMV4_5_CPSR].valid = 1;
+       uint32_t cpsr;
+
+       cpsr = buf_get_u32(armv4_5->cpsr->value, 0, 32);
+       cpsr &= ~0xff;
+       cpsr |= 0xd3;
+       arm_set_cpsr(armv4_5, cpsr);
+       armv4_5->cpsr->dirty = 1;
 
        /* start fetching from 0x0 */
        buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, 0x0);
        armv4_5->core_cache->reg_list[15].dirty = 1;
        armv4_5->core_cache->reg_list[15].valid = 1;
 
-       armv4_5->core_mode = ARMV4_5_MODE_SVC;
-       armv4_5->core_state = ARMV4_5_STATE_ARM;
-
        arm720t_disable_mmu_caches(target, 1, 1, 1);
        arm720t->armv4_5_mmu.mmu_enabled = 0;
        arm720t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled = 0;
@@ -412,11 +413,11 @@ static int arm720t_target_create(struct target *target, Jim_Interp *interp)
 COMMAND_HANDLER(arm720t_handle_cp15_command)
 {
        int retval;
-       struct target *target = get_current_target(cmd_ctx);
+       struct target *target = get_current_target(CMD_CTX);
        struct arm720t_common *arm720t = target_to_arm720(target);
        struct arm_jtag *jtag_info;
 
-       retval = arm720t_verify_pointer(cmd_ctx, arm720t);
+       retval = arm720t_verify_pointer(CMD_CTX, arm720t);
        if (retval != ERROR_OK)
                return retval;
 
@@ -424,7 +425,7 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
 
        if (target->state != TARGET_HALTED)
        {
-               command_print(cmd_ctx, "target must be stopped for \"%s\" command", CMD_NAME);
+               command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
                return ERROR_OK;
        }
 
@@ -439,7 +440,7 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
                        uint32_t value;
                        if ((retval = arm720t_read_cp15(target, opcode, &value)) != ERROR_OK)
                        {
-                               command_print(cmd_ctx, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
+                               command_print(CMD_CTX, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
                                return ERROR_OK;
                        }
 
@@ -448,7 +449,7 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
                                return retval;
                        }
 
-                       command_print(cmd_ctx, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
+                       command_print(CMD_CTX, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
                }
                else if (CMD_ARGC == 2)
                {
@@ -457,10 +458,10 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
 
                        if ((retval = arm720t_write_cp15(target, opcode, value)) != ERROR_OK)
                        {
-                               command_print(cmd_ctx, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
+                               command_print(CMD_CTX, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
                                return ERROR_OK;
                        }
-                       command_print(cmd_ctx, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
+                       command_print(CMD_CTX, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
                }
        }
 
@@ -498,11 +499,11 @@ static int arm720t_register_commands(struct command_context *cmd_ctx)
 
        retval = arm7_9_register_commands(cmd_ctx);
 
-       arm720t_cmd = register_command(cmd_ctx, NULL, "arm720t",
+       arm720t_cmd = COMMAND_REGISTER(cmd_ctx, NULL, "arm720t",
                        NULL, COMMAND_ANY,
                        "arm720t specific commands");
 
-       register_command(cmd_ctx, arm720t_cmd, "cp15",
+       COMMAND_REGISTER(cmd_ctx, arm720t_cmd, "cp15",
                        arm720t_handle_cp15_command, COMMAND_EXEC,
                        "display/modify cp15 register <opcode> [value]");