uint8_t id = AO_SPI_INDEX(spi_index);
struct stm_spi *stm_spi = ao_spi_stm_info[id].stm_spi;
+ switch (id) {
+#if SPI_1_POWER_MANAGE
+ case 0:
+ stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SPI1EN);
+ break;
+#endif
+#if SPI_2_POWER_MANAGE
+ case 1:
+ stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_SPI2EN);
+ break;
+#endif
+ }
if (spi_index != ao_spi_index[id]) {
/* Disable old config
struct stm_spi *stm_spi = ao_spi_stm_info[id].stm_spi;
stm_spi->cr1 = 0;
+ switch (id) {
+#if SPI_1_POWER_MANAGE
+ case 0:
+ stm_rcc.apb2enr &= ~(1 << STM_RCC_APB2ENR_SPI1EN);
+ break;
+#endif
+#if SPI_2_POWER_MANAGE
+ case 1:
+ stm_rcc.apb1enr &= ~(1 << STM_RCC_APB1ENR_SPI2EN);
+ break;
+#endif
+ }
ao_mutex_put(&ao_spi_mutex[id]);
}
ao_spi_init(void)
{
#if HAS_SPI_1
+#ifndef SPI_1_PA5_PA6_PA7
+#error SPI_1_PA5_PA6_PA7 undefined
+#endif
# if SPI_1_PA5_PA6_PA7
stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPAEN);
stm_ospeedr_set(&stm_gpioa, 5, SPI_1_OSPEEDR);
stm_ospeedr_set(&stm_gpioa, 6, SPI_1_OSPEEDR);
stm_ospeedr_set(&stm_gpioa, 7, SPI_1_OSPEEDR);
# endif
+# ifndef SPI_1_PB3_PB4_PB5
+# error SPI_1_PB3_PB4_PB5 undefined
+# endif
# if SPI_1_PB3_PB4_PB5
stm_rcc.ahbenr |= (1 << STM_RCC_AHBENR_IOPBEN);
stm_ospeedr_set(&stm_gpiob, 3, SPI_1_OSPEEDR);