altos/draw: hand-edit 64-pixel 3/5 to avoid jank

[fw/altos] / src / stmf0 / ao_adc_stm.c

diff --git a/src/stmf0/ao_adc_stm.c b/src/stmf0/ao_adc_stm.c
index e62bb16e23be38ae4c53759cbc0fb0ab521990fe..e5471b12fd3e01e8cfe1fed6d6ab6005b727bbbe 100644 (file)
--- a/src/stmf0/ao_adc_stm.c
+++ b/src/stmf0/ao_adc_stm.c
@@ -38,23 +38,7 @@ static void ao_adc_done(int index)
 
        AO_DATA_PRESENT(AO_DATA_ADC);
        ao_dma_done_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1));
-       if (ao_data_present == AO_DATA_ALL) {
-#if HAS_MS5607
-               ao_data_ring[ao_data_head].ms5607_raw = ao_ms5607_current;
-#endif
-#if HAS_MMA655X
-               ao_data_ring[ao_data_head].mma655x = ao_mma655x_current;
-#endif
-#if HAS_HMC5883
-               ao_data_ring[ao_data_head].hmc5883 = ao_hmc5883_current;
-#endif
-#if HAS_MPU6000
-               ao_data_ring[ao_data_head].mpu6000 = ao_mpu6000_current;
-#endif
-               ao_data_ring[ao_data_head].tick = ao_tick_count;
-               ao_data_head = ao_data_ring_next(ao_data_head);
-               ao_wakeup((void *) &ao_data_head);
-       }
+       ao_data_fill(ao_data_head);
        ao_adc_ready = 1;
 }
 
@@ -194,7 +178,7 @@ ao_adc_init(void)
 
        /* Reset ADC */
        stm_rcc.apb2rstr |= (1 << STM_RCC_APB2RSTR_ADCRST);
-       stm_rcc.apb2rstr &= ~(1 << STM_RCC_APB2RSTR_ADCRST);
+       stm_rcc.apb2rstr &= ~(1UL << STM_RCC_APB2RSTR_ADCRST);
 
        /* Turn on ADC pins */
        stm_rcc.ahbenr |= AO_ADC_RCC_AHBENR;
@@ -267,8 +251,8 @@ ao_adc_init(void)
 #endif
 
        /* Wait for ADC to be idle */
-       while (stm_adc.cr & ((1 << STM_ADC_CR_ADCAL) |
-                            (1 << STM_ADC_CR_ADDIS)))
+       while (stm_adc.cr & ((1UL << STM_ADC_CR_ADCAL) |
+                            (1UL << STM_ADC_CR_ADDIS)))
                ;
 
        /* Disable */
@@ -279,10 +263,10 @@ ao_adc_init(void)
        }
 
        /* Turn off everything */
-       stm_adc.cr &= ~((1 << STM_ADC_CR_ADCAL) |
-                       (1 << STM_ADC_CR_ADSTP) |
-                       (1 << STM_ADC_CR_ADSTART) |
-                       (1 << STM_ADC_CR_ADEN));
+       stm_adc.cr &= ~((1UL << STM_ADC_CR_ADCAL) |
+                       (1UL << STM_ADC_CR_ADSTP) |
+                       (1UL << STM_ADC_CR_ADSTART) |
+                       (1UL << STM_ADC_CR_ADEN));
 
        /* Configure */
        stm_adc.cfgr1 = ((0 << STM_ADC_CFGR1_AWDCH) |                             /* analog watchdog channel 0 */
@@ -313,8 +297,8 @@ ao_adc_init(void)
                       (0 << STM_ADC_CCR_VREFEN));
 
        /* Calibrate */
-       stm_adc.cr |= (1 << STM_ADC_CR_ADCAL);
-       while ((stm_adc.cr & (1 << STM_ADC_CR_ADCAL)) != 0)
+       stm_adc.cr |= (1UL << STM_ADC_CR_ADCAL);
+       while ((stm_adc.cr & (1UL << STM_ADC_CR_ADCAL)) != 0)
                ;
 
        /* Enable */
@@ -329,7 +313,7 @@ ao_adc_init(void)
        stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_SYSCFGCOMPEN);
 
        /* Set ADC to use DMA channel 1 (option 1) */
-       stm_syscfg.cfgr1 &= ~(1 << STM_SYSCFG_CFGR1_ADC_DMA_RMP);
+       stm_syscfg.cfgr1 &= ~(1UL << STM_SYSCFG_CFGR1_ADC_DMA_RMP);
 
        ao_dma_alloc(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC_1));