/* Maximum number of samples fetched per _ao_adc_start call */
#define AO_ADC_RING_CHUNK (AO_ADC_RING_SIZE >> 1)
-uint16_t ao_adc_ring_head, ao_adc_ring_tail;
+uint16_t ao_adc_ring_head, ao_adc_ring_remain;
uint16_t ao_adc_running;
/*
{
(void) index;
ao_adc_ring_head += ao_adc_running;
+ ao_adc_ring_remain += ao_adc_running;
if (ao_adc_ring_head == AO_ADC_RING_SIZE)
ao_adc_ring_head = 0;
ao_adc_running = 0;
ao_adc_init(void)
{
uint32_t chselr;
- int i;
/* Reset ADC */
stm_rcc.apb2rstr |= (1 << STM_RCC_APB2RSTR_ADCRST);
/* Shortest sample time */
stm_adc.smpr = STM_ADC_SMPR_SMP_1_5 << STM_ADC_SMPR_SMP;
+ /* Turn off enable and start */
+ stm_adc.cr &= ~((1 << STM_ADC_CR_ADEN) | (1 << STM_ADC_CR_ADSTART));
+
/* Calibrate */
stm_adc.cr |= (1 << STM_ADC_CR_ADCAL);
- for (i = 0; i < 0xf000; i++) {
- if ((stm_adc.cr & (1 << STM_ADC_CR_ADCAL)) == 0)
- break;
- }
+ while ((stm_adc.cr & (1 << STM_ADC_CR_ADCAL)) != 0)
+ ;
/* Enable */
stm_adc.cr |= (1 << STM_ADC_CR_ADEN);