#define STM_RCC_DCKCFGR2_SDIOSEL_CK_48MHZ 0
#define STM_RCC_DCKCFGR2_SDIOSEL_SYSTEM_CLOCK 1
#define STM_RCC_DCKCFGR2_CK48MSEL 27
-#define STM_RCC_DCKCFGR2_CK48MSEL_PLL_Q 1
+#define STM_RCC_DCKCFGR2_CK48MSEL_PLL_Q 0
#define STM_RCC_DCKCFGR2_CK48MSEL_PLLI2S_Q 1
#define STM_RCC_DCKCFGR2_I2CFMP1SEL 22
#define STM_RCC_DCKCFGR2_I2CFMP1SEL_APB 0