#include "ao.h"
#include <ao_task.h>
+#if HAS_FAKE_FLIGHT
+#include <ao_fake_flight.h>
+#endif
#ifndef HAS_TICK
#define HAS_TICK 1
#if AO_DATA_ALL
if (++ao_data_count == ao_data_interval) {
ao_data_count = 0;
- ao_adc_poll();
+#if HAS_FAKE_FLIGHT
+ if (ao_fake_flight_active)
+ ao_fake_flight_poll();
+ else
+#endif
+ ao_adc_poll();
#if (AO_DATA_ALL & ~(AO_DATA_ADC))
ao_wakeup((void *) &ao_data_count);
#endif
}
+#endif
+#ifdef AO_TIMER_HOOK
+ AO_TIMER_HOOK;
#endif
}
}
/* Switch to MSI while messing about */
stm_rcc.cr |= (1 << STM_RCC_CR_MSION);
while (!(stm_rcc.cr & (1 << STM_RCC_CR_MSIRDY)))
- asm("nop");
+ ao_arch_nop();
+
+ stm_rcc.cfgr = (stm_rcc.cfgr & ~(STM_RCC_CFGR_SW_MASK << STM_RCC_CFGR_SW)) |
+ (STM_RCC_CFGR_SW_MSI << STM_RCC_CFGR_SW);
+
+ /* wait for system to switch to MSI */
+ while ((stm_rcc.cfgr & (STM_RCC_CFGR_SWS_MASK << STM_RCC_CFGR_SWS)) !=
+ (STM_RCC_CFGR_SWS_MSI << STM_RCC_CFGR_SWS))
+ ao_arch_nop();
/* reset SW, HPRE, PPRE1, PPRE2, MCOSEL and MCOPRE */
stm_rcc.cfgr &= (uint32_t)0x88FFC00C;
stm_flash.acr |= (1 << STM_FLASH_ACR_PRFEN);
/* Enable 1 wait state so the CPU can run at 32MHz */
- /* (haven't managed to run the CPU at 32MHz yet, it's at 16MHz) */
stm_flash.acr |= (1 << STM_FLASH_ACR_LATENCY);
/* Enable power interface clock */