* STM32L definitions and code fragments for AltOS
*/
-#define AO_STACK_SIZE 700
+#define AO_STACK_SIZE 512
#define AO_LED_TYPE uint16_t
+#ifndef AO_TICK_TYPE
+#define AO_TICK_TYPE uint16_t
+#define AO_TICK_SIGNED int16_t
+#endif
+
/* Various definitions to make GCC look more like SDCC */
#define ao_arch_naked_declare __attribute__((naked))
#define __xdata
#define __code const
#define __reentrant
-#define __critical
#define __interrupt(n)
#define __at(n)
-#define CORTEX_M3_AIRCR ((uint32_t *) 0xe000ed0c)
-
-#define ao_arch_reboot() (*((uint32_t *) 0xe000ed0c) = 0x05fa0004)
+#define ao_arch_reboot() \
+ (stm_scb.aircr = ((STM_SCB_AIRCR_VECTKEY_KEY << STM_SCB_AIRCR_VECTKEY) | \
+ (1 << STM_SCB_AIRCR_SYSRESETREQ)))
#define ao_arch_nop() asm("nop")
extern char getchar(void);
extern void ao_avr_stdio_init(void);
-extern const uint16_t ao_serial_number;
-#define ARM_PUSH32(stack, val) (*(--(stack)) = (val))
+/*
+ * ao_romconfig.c
+ */
+
+#define AO_ROMCONFIG_VERSION 2
+
+#define AO_ROMCONFIG_SYMBOL(a) __attribute__((section(".romconfig"))) const
+
+extern const uint16_t ao_romconfig_version;
+extern const uint16_t ao_romconfig_check;
+extern const uint16_t ao_serial_number;
+extern const uint32_t ao_radio_cal;
#define ao_arch_task_members\
uint32_t *sp; /* saved stack pointer */
-#define cli() asm("cpsid i")
-#define sei() asm("cpsie i")
-
-#define ao_arch_init_stack(task, start) do { \
- uint32_t *sp = (uint32_t *) (task->stack + AO_STACK_SIZE); \
- uint32_t a = (uint32_t) start; \
- int i; \
- \
- /* Return address (goes into LR) */ \
- ARM_PUSH32(sp, a); \
- \
- /* Clear register values r0-r12 */ \
- i = 13; \
- while (i--) \
- ARM_PUSH32(sp, 0); \
- \
- /* APSR */ \
- ARM_PUSH32(sp, 0); \
- \
- /* PRIMASK with interrupts enabled */ \
- ARM_PUSH32(sp, 0); \
- \
- task->sp = sp; \
-} while (0);
-
-#define ao_arch_save_regs() do { \
- /* Save general registers */ \
- asm("push {r0-r12,lr}\n"); \
- \
- /* Save APSR */ \
- asm("mrs r0,apsr"); \
- asm("push {r0}"); \
- \
- /* Save PRIMASK */ \
- asm("mrs r0,primask"); \
- asm("push {r0}"); \
- \
- /* Enable interrupts */ \
- sei(); \
- } while (0)
-
-#define ao_arch_save_stack() do { \
- uint32_t *sp; \
- asm("mov %0,sp" : "=&r" (sp) ); \
- ao_cur_task->sp = (sp); \
- if ((uint8_t *) sp < &ao_cur_task->stack[0]) \
- ao_panic (AO_PANIC_STACK); \
- } while (0)
-
-#if 0
-#define ao_arch_isr_stack() do { \
- uint32_t *sp = (uint32_t *) 0x20004000; \
- asm("mov %0,sp" : "=&r" (sp) ); \
- } while (0)
-#else
-#define ao_arch_isr_stack()
-#endif
-
+#define ao_arch_block_interrupts() asm("cpsid i")
+#define ao_arch_release_interrupts() asm("cpsie i")
-#define ao_arch_cpu_idle() do { \
- asm("wfi"); \
- } while (0)
-
-#define ao_arch_restore_stack() do { \
- uint32_t sp; \
- sp = (uint32_t) ao_cur_task->sp; \
- \
- /* Switch stacks */ \
- asm("mov sp, %0" : : "r" (sp) ); \
- \
- /* Restore PRIMASK */ \
- asm("pop {r0}"); \
- asm("msr primask,r0"); \
- \
- /* Restore APSR */ \
- asm("pop {r0}"); \
- asm("msr apsr,r0"); \
- \
- /* Restore general registers */ \
- asm("pop {r0-r12,lr}\n"); \
- \
- /* Return to calling function */ \
- asm("bx lr"); \
- } while(0)
-
-#define ao_arch_critical(b) do { cli(); do { b } while (0); sei(); } while (0)
/*
* For now, we're running at a weird frequency