samd21: Macro-ize the DMA register settings a bit

[fw/altos] / src / samd21 / ao_spi_samd21.c

diff --git a/src/samd21/ao_spi_samd21.c b/src/samd21/ao_spi_samd21.c
index 487c23eb36cb768a06fb2bd6c2cfdd8c77fc36c5..6e49884b69248f9f8299fc9454d7d720abfd5b96 100644 (file)
--- a/src/samd21/ao_spi_samd21.c
+++ b/src/samd21/ao_spi_samd21.c
@@ -13,6 +13,7 @@
  */
 
 #include <ao.h>
+#include <ao_dma_samd21.h>
 
 static uint8_t         ao_spi_mutex[SAMD21_NUM_SERCOM];
 static uint8_t         ao_spi_pin_config[SAMD21_NUM_SERCOM];
@@ -42,14 +43,149 @@ static const struct ao_spi_samd21_info ao_spi_samd21_info[SAMD21_NUM_SERCOM] = {
        },
 };
 
-//static uint8_t       spi_dev_null;
+static uint8_t spi_dev_null;
+
+#define USE_DMA        1
+
+#if USE_DMA
+
+#define AO_SAMD21_SPI_MISO_DMA_ID      0
+#define AO_SAMD21_SPI_MOSI_DMA_ID      1
+
+static uint8_t ao_spi_done[SAMD21_NUM_SERCOM];
+
+static void
+_ao_spi_recv_dma_done(uint8_t dma_id, void *closure)
+{
+       uint8_t id = (uint8_t) (uintptr_t) closure;
+
+       (void) dma_id;
+       ao_spi_done[id] = 1;
+       ao_wakeup(&ao_spi_done[id]);
+}
+#endif
+
+static inline uint32_t
+dma_chctrlb(uint8_t id, bool tx)
+{
+       uint32_t        chctrlb = 0;
+
+       /* No complicated actions needed */
+       chctrlb |= SAMD21_DMAC_CHCTRLB_CMD_NOACT << SAMD21_DMAC_CHCTRLB_CMD;
+
+       /* Trigger after each byte transferred */
+       chctrlb |= SAMD21_DMAC_CHCTRLB_TRIGACT_BEAT << SAMD21_DMAC_CHCTRLB_TRIGACT;
+
+       /* Set the trigger source */
+       if (tx)
+               chctrlb |= SAMD21_DMAC_CHCTRLB_TRIGSRC_SERCOM_TX(id) << SAMD21_DMAC_CHCTRLB_TRIGSRC;
+       else
+               chctrlb |= SAMD21_DMAC_CHCTRLB_TRIGSRC_SERCOM_RX(id) << SAMD21_DMAC_CHCTRLB_TRIGSRC;
+
+       /* RX has priority over TX so that we don't drop incoming bytes */
+       if (tx)
+               chctrlb |= SAMD21_DMAC_CHCTRLB_LVL_LVL0 << SAMD21_DMAC_CHCTRLB_LVL;
+       else
+               chctrlb |= SAMD21_DMAC_CHCTRLB_LVL_LVL3 << SAMD21_DMAC_CHCTRLB_LVL;
+
+       /* No events needed */
+       chctrlb |= 0UL << SAMD21_DMAC_CHCTRLB_EVOE;
+       chctrlb |= 0UL << SAMD21_DMAC_CHCTRLB_EVIE;
+
+       /* And no actions either */
+       chctrlb |= SAMD21_DMAC_CHCTRLB_EVACT_NOACT << SAMD21_DMAC_CHCTRLB_EVACT;
+
+       return chctrlb;
+}
+
+static inline uint16_t
+dma_btctrl(bool tx, bool step)
+{
+       uint16_t        btctrl = 0;
+
+       /* Always step by 1 */
+       btctrl |= SAMD21_DMAC_DESC_BTCTRL_STEPSIZE_X1 << SAMD21_DMAC_DESC_BTCTRL_STEPSIZE;
+
+       /* Step the source if transmit, otherwise step the dest */
+       if (tx)
+               btctrl |= SAMD21_DMAC_DESC_BTCTRL_STEPSEL_SRC << SAMD21_DMAC_DESC_BTCTRL_STEPSEL;
+       else
+               btctrl |= SAMD21_DMAC_DESC_BTCTRL_STEPSEL_DST << SAMD21_DMAC_DESC_BTCTRL_STEPSEL;
+
+       /* Set the increment if stepping */
+       if (tx) {
+               if (step)
+                       btctrl |= 1UL << SAMD21_DMAC_DESC_BTCTRL_SRCINC;
+               else
+                       btctrl |= 0UL << SAMD21_DMAC_DESC_BTCTRL_SRCINC;
+               btctrl |= 0UL << SAMD21_DMAC_DESC_BTCTRL_DSTINC;
+       } else {
+               btctrl |= 0UL << SAMD21_DMAC_DESC_BTCTRL_SRCINC;
+               if (step)
+                       btctrl |= 1UL << SAMD21_DMAC_DESC_BTCTRL_DSTINC;
+               else
+                       btctrl |= 0UL << SAMD21_DMAC_DESC_BTCTRL_DSTINC;
+       }
+
+       /* byte at a time please */
+       btctrl |= SAMD21_DMAC_DESC_BTCTRL_BEATSIZE_BYTE << SAMD21_DMAC_DESC_BTCTRL_BEATSIZE;
+
+       /*
+        * Watch for interrupts on RX -- we need to wait for the last byte to get received
+        * to know the SPI bus is idle
+        */
+       if (tx)
+               btctrl |= SAMD21_DMAC_DESC_BTCTRL_BLOCKACT_NOACT << SAMD21_DMAC_DESC_BTCTRL_BLOCKACT;
+       else
+               btctrl |= SAMD21_DMAC_DESC_BTCTRL_BLOCKACT_INT << SAMD21_DMAC_DESC_BTCTRL_BLOCKACT;
+
+       /* don't need any events */
+       btctrl |= SAMD21_DMAC_DESC_BTCTRL_EVOSEL_DISABLE << SAMD21_DMAC_DESC_BTCTRL_EVOSEL;
+
+       /* And make the descriptor valid */
+       btctrl |= 1UL << SAMD21_DMAC_DESC_BTCTRL_VALID;
+
+       return btctrl;
+}
 
 void
 ao_spi_send(const void *block, uint16_t len, uint8_t spi_index)
 {
        uint8_t                 id = AO_SPI_INDEX(spi_index);
        struct samd21_sercom    *sercom = ao_spi_samd21_info[id].sercom;
-
+#if USE_DMA
+
+       ao_arch_block_interrupts();
+       ao_spi_done[id] = 0;
+
+       _ao_dma_start_transfer(AO_SAMD21_SPI_MISO_DMA_ID,
+                              (void *) &sercom->data,
+                              &spi_dev_null,
+                              len,
+                              dma_chctrlb(id, false),
+                              dma_btctrl(false, false),
+
+                              _ao_spi_recv_dma_done,
+                              (void *) (uintptr_t) id
+               );
+
+       _ao_dma_start_transfer(AO_SAMD21_SPI_MOSI_DMA_ID,
+                              (uint8_t *) block + len, /* must point past the end of the block */
+                              (void *) &sercom->data,
+                              len,
+                              dma_chctrlb(id, true),
+                              dma_btctrl(true, true),
+                              NULL,
+                              NULL
+               );
+
+       while (ao_spi_done[id] == 0)
+               ao_sleep(&ao_spi_done[id]);
+
+       _ao_dma_done_transfer(AO_SAMD21_SPI_MOSI_DMA_ID);
+       _ao_dma_done_transfer(AO_SAMD21_SPI_MISO_DMA_ID);
+       ao_arch_release_interrupts();
+#else
        const uint8_t *b = block;
 
        while (len--) {
@@ -58,8 +194,10 @@ ao_spi_send(const void *block, uint16_t len, uint8_t spi_index)
                        ;
                (void) sercom->data;
        }
+#endif
 }
 
+
 void
 ao_spi_recv(void *block, uint16_t len, uint8_t spi_index)
 {