/* PIO0_1 */
#define LPC_IOCONF_FUNC_PIO0_1 0
#define LPC_IOCONF_FUNC_CLKOUT 1
-#define LPC_IOCONF_FUNC_CT32B0_MAT2 2
+#define LPC_IOCONF_FUNC_PIO0_1_CT32B0_MAT2 2
#define LPC_IOCONF_FUNC_USB_FTOGGLE 3
/* PIO0_2 */
#define LPC_IOCONF_FUNC_PIO0_2 0
#define LPC_IOCONF_FUNC_SSEL0 1
-#define LPC_IOCONF_FUNC_CT16B0_CAP0 2
+#define LPC_IOCONF_FUNC_PIO0_2_CT16B0_CAP0 2
/* PIO0_3 */
#define LPC_IOCONF_FUNC_PIO0_3 0
/* PIO0_8 */
#define LPC_IOCONF_FUNC_PIO0_8 0
#define LPC_IOCONF_FUNC_MISO0 1
-#define LPC_IOCONF_FUNC_CT16B0_MAT0 2
+#define LPC_IOCONF_FUNC_PIO0_8_CT16B0_MAT0 2
/* PIO0_9 */
#define LPC_IOCONF_FUNC_PIO0_9 0
#define LPC_IOCONF_FUNC_MOSI0 1
-#define LPC_IOCONF_FUNC_CT16B0_MAT1 2
+#define LPC_IOCONF_FUNC_PIO0_9_CT16B0_MAT1 2
/* PIO0_10 */
#define LPC_IOCONF_FUNC_SWCLK 0
#define LPC_IOCONF_FUNC_PIO0_10 1
#define LPC_IOCONF_FUNC_PIO0_10_SCK0 2
-#define LPC_IOCONF_FUNC_CT16B0_MAT2 3
+#define LPC_IOCONF_FUNC_PIO0_10_CT16B0_MAT2 3
/* PIO0_11 */
#define LPC_IOCONF_FUNC_TDI 0
#define LPC_IOCONF_FUNC_PIO0_11 1
#define LPC_IOCONF_FUNC_AD0 2
-#define LPC_IOCONF_FUNC_CT32B0_MAT3 3
+#define LPC_IOCONF_FUNC_PIO0_11_CT32B0_MAT3 3
/* PIO0_12 */
#define LPC_IOCONF_FUNC_TMS 0
#define LPC_IOCONF_FUNC_PIO0_12 1
#define LPC_IOCONF_FUNC_AD1 2
-#define LPC_IOCONF_FUNC_CT32B1_CAP0 3
+#define LPC_IOCONF_FUNC_PIO0_12_CT32B1_CAP0 3
/* PIO0_13 */
#define LPC_IOCONF_FUNC_TD0 0
#define LPC_IOCONF_FUNC_PIO0_13 1
#define LPC_IOCONF_FUNC_AD2 2
-#define LPC_IOCONF_FUNC_CT32B1_MAT0 3
+#define LPC_IOCONF_FUNC_PIO0_13_CT32B1_MAT0 3
/* PIO0_14 */
#define LPC_IOCONF_FUNC_TRST 0
#define LPC_IOCONF_FUNC_SWDIO 0
#define LPC_IOCONF_FUNC_PIO0_15 1
#define LPC_IOCONF_FUNC_AD4 2
-#define LPC_IOCONF_FUNC_CT32B1_MAT2 3
+#define LPC_IOCONF_FUNC_PIO0_15_CT32B1_MAT2 3
/* PIO0_16 */
#define LPC_IOCONF_FUNC_PIO0_16 0
#define LPC_IOCONF_FUNC_AD5 1
-#define LPC_IOCONF_FUNC_CT32B1_MAT3 2
+#define LPC_IOCONF_FUNC_PIO0_16_CT32B1_MAT3 2
/* PIO0_17 */
#define LPC_IOCONF_FUNC_PIO0_17 0
/* PIO0_20 */
#define LPC_IOCONF_FUNC_PIO0_20 0
-#define LPC_IOCONF_FUNC_CT16B1_CAP0 1
+#define LPC_IOCONF_FUNC_PIO0_20_CT16B1_CAP0 1
/* PIO0_21 */
#define LPC_IOCONF_FUNC_PIO0_21 0
-#define LPC_IOCONF_FUNC_CT16B1_MAT0 1
+#define LPC_IOCONF_FUNC_PIO0_21_CT16B1_MAT0 1
#define LPC_IOCONF_FUNC_PIO0_21_MOSI1 2
/* PIO0_22 */
#define LPC_IOCONF_FUNC_PIO0_22 0
#define LPC_IOCONF_FUNC_AD6 1
-#define LPC_IOCONF_FUNC_CT16B1_MAT1 2
+#define LPC_IOCONF_FUNC_PIO0_22_CT16B1_MAT1 2
#define LPC_IOCONF_FUNC_PIO0_22_MISO1 3
/* PIO0_23 */
/* PIO1_0 */
#define LPC_IOCONF_FUNC_PIO1_0 0
-#define LPC_IOCONF_FUNC_CT32B1_MAT1 1
+#define LPC_IOCONF_FUNC_PIO1_0_CT32B1_MAT1 1
/* PIO1_1 */
#define LPC_IOCONF_FUNC_PIO1_1 0
-#define LPC_IOCONF_FUNC_CT32B1_MAT1 1
+#define LPC_IOCONF_FUNC_PIO1_1_CT32B1_MAT1 1
/* PIO1_2 */
#define LPC_IOCONF_FUNC_PIO1_2 0
/* PIO1_5 */
#define LPC_IOCONF_FUNC_PIO1_5 0
-#define LPC_IOCONF_FUNC_CT32B1_CAP1 1
+#define LPC_IOCONF_FUNC_PIO1_5_CT32B1_CAP1 1
/* PIO1_6 */
#define LPC_IOCONF_FUNC_PIO1_6 0
/* PIO1_13 */
#define LPC_IOCONF_FUNC_PIO1_13 0
#define LPC_IOCONF_FUNC_DTR 1
-#define LPC_IOCONF_FUNC_CT16B0_MAT0 2
+#define LPC_IOCONF_FUNC_PIO1_13_CT16B0_MAT0 2
#define LPC_IOCONF_FUNC_PIO1_13_TXD 3
/* PIO1_14 */
#define LPC_IOCONF_FUNC_PIO1_14 0
#define LPC_IOCONF_FUNC_DSR 1
-#define LPC_IOCONF_FUNC_CT16B0_MAT1 2
+#define LPC_IOCONF_FUNC_PIO1_14_CT16B0_MAT1 2
#define LPC_IOCONF_FUNC_PIO1_13_RXD 3
/* PIO1_15 */
/* PIO1_16 */
#define LPC_IOCONF_FUNC_PIO1_16 0
#define LPC_IOCONF_FUNC_RI 1
-#define LPC_IOCONF_FUNC_CT16B0_CAP0 2
+#define LPC_IOCONF_FUNC_PIO1_16_CT16B0_CAP0 2
/* PIO1_17 */
#define LPC_IOCONF_FUNC_PIO1_17 0
-#define LPC_IOCONF_FUNC_CT16B0_CAP1 1
+#define LPC_IOCONF_FUNC_PIO1_17_CT16B0_CAP1 1
#define LPC_IOCONF_FUNC_PIO1_17_RXD 2
/* PIO1_18 */
#define LPC_IOCONF_FUNC_PIO1_18 0
-#define LPC_IOCONF_FUNC_CT16B1_CAP1 1
+#define LPC_IOCONF_FUNC_PIO1_18_CT16B1_CAP1 1
#define LPC_IOCONF_FUNC_PIO1_18_TXD 2
/* PIO1_19 */
#define LPC_SCB_PDRUNCFG_USBPLL_PD 8
#define LPC_SCB_PDRUNCFG_USBPAD_PD 10
+struct lpc_i2c {
+ vuint32_t conset;
+ vuint32_t stat;
+ vuint32_t dat;
+ vuint32_t adr0;
+
+ vuint32_t sclh;
+ vuint32_t scll;
+ vuint32_t conclr;
+ vuint32_t mmctrl;
+
+ vuint32_t adr[3];
+ vuint32_t data_buffer;
+
+ vuint32_t mask[4];
+};
+
+extern struct lpc_i2c lpc_i2c;
+
+#define lpc_i2c (*(struct lpc_i2c *) 0x40000000)
+
+#define LPC_I2C_CONSET_AA 2
+#define LPC_I2C_CONSET_SI 3
+#define LPC_I2C_CONSET_STO 4
+#define LPC_I2C_CONSET_STA 5
+#define LPC_I2C_CONSET_I2EN 6
+
+/* master status values */
+#define LPC_I2C_STAT_ERROR 0x00
+#define LPC_I2C_STAT_START 0x08
+#define LPC_I2C_STAT_REPEAT_START 0x10
+#define LPC_I2C_STAT_TX_START_ACK 0x18
+#define LPC_I2C_STAT_TX_START_NACK 0x20
+#define LPC_I2C_STAT_TX_ACK 0x28
+#define LPC_I2C_STAT_TX_NACK 0x30
+#define LPC_I2C_STAT_TX_ARB_LOST 0x38
+#define LPC_I2C_STAT_RX_START_ACK 0x40
+#define LPC_I2C_STAT_RX_START_NACK 0x48
+#define LPC_I2C_STAT_RX_ACK 0x50
+#define LPC_I2C_STAT_RX_NACK 0x58
+
+
+#define LPC_I2C_ADR_GC 0
+#define LPC_I2C_ADR_ADDRESS 1
+
+#define LPC_I2C_CONCLR_AAC 2
+#define LPC_I2C_CONCLR_SIC 3
+#define LPC_I2C_CONCLR_STAC 5
+#define LPC_I2C_CONCLR_I2ENC 6
+
+#define LPC_I2C_MMCTRL_MM_ENA 0
+#define LPC_I2C_MMCTRL_ENA_SCL 1
+#define LPC_I2C_MMCTRL_MATCH_ALL 2
+
+#define LPC_I2C_MASK_MASK 1
+
struct lpc_flash {
uint32_t r0[4]; /* 0x0 */
projects / fw / altos / blobdiff