*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
#ifndef _AO_ARCH_FUNCS_H_
#define _AO_ARCH_FUNCS_H_
-#define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
-#define ao_spi_put_bit(reg,bit,pin,bus) ao_spi_put_mask(reg,(1<<bit),bus)
+#define ao_spi_get_bit(reg,bit,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
+#define ao_spi_put_bit(reg,bit,bus) ao_spi_put_mask(reg,(1<<bit),bus)
#define ao_enable_port(port) (lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_GPIO))
#define ao_disable_port(port) (lpc_scb.sysahbclkctrl &= ~(1 << LPC_SCB_SYSAHBCLKCTRL_GPIO))
#define lpc_all_bit(port,bit) (((port) << 5) | (bit))
-#define ao_gpio_set(port, bit, pin, v) (lpc_gpio.byte[lpc_all_bit(port,bit)] = (v))
+#define ao_gpio_set(port, bit, v) (lpc_gpio.byte[lpc_all_bit(port,bit)] = (v))
-#define ao_gpio_get(port, bit, pin) (lpc_gpio.byte[lpc_all_bit(port,bit)])
+#define ao_gpio_get(port, bit) (lpc_gpio.byte[lpc_all_bit(port,bit)])
-#define ao_enable_output(port,bit,pin,v) do { \
+#define PORT0_JTAG_REGS ((1 << 11) | (1 << 12) | (1 << 14))
+
+static inline void lpc_set_gpio(int port, int bit) {
+ if (port == 0 && (1 << bit) & (PORT0_JTAG_REGS)) {
+ vuint32_t *_ioconf = &lpc_ioconf.pio0_0 + ((port)*24+(bit));
+
+ *_ioconf = (*_ioconf & ~LPC_IOCONF_FUNC_MASK) | LPC_IOCONF_FUNC_PIO0_11;
+ }
+}
+
+#define ao_enable_output(port,bit,v) do { \
ao_enable_port(port); \
- ao_gpio_set(port, bit, pin, v); \
+ lpc_set_gpio(port,bit); \
+ ao_gpio_set(port, bit, v); \
lpc_gpio.dir[port] |= (1 << bit); \
} while (0)
#define ao_enable_input(port,bit,mode) do { \
ao_enable_port(port); \
+ lpc_set_gpio(port,bit); \
lpc_gpio.dir[port] &= ~(1 << bit); \
ao_gpio_set_mode(port,bit,mode); \
} while (0)
}
static inline void
-ao_arch_memory_barrier() {
+ao_arch_memory_barrier(void) {
asm volatile("" ::: "memory");
}
#if HAS_TASK
static inline void
-ao_arch_init_stack(struct ao_task *task, void *start)
+ao_arch_init_stack(struct ao_task *task, uint32_t *sp, void *start)
{
- uint32_t *sp = (uint32_t *) (task->stack + AO_STACK_SIZE);
uint32_t a = (uint32_t) start;
int i;
/* PRIMASK with interrupts enabled */
ARM_PUSH32(sp, 0);
- task->sp = sp;
+ task->sp32 = sp;
}
static inline void ao_arch_save_regs(void) {
static inline void ao_arch_save_stack(void) {
uint32_t *sp;
asm("mov %0,sp" : "=&r" (sp) );
- ao_cur_task->sp = (sp);
- if ((uint8_t *) sp < &ao_cur_task->stack[0])
+ ao_cur_task->sp32 = (sp);
+ if (sp < &ao_cur_task->stack32[0])
ao_panic (AO_PANIC_STACK);
}
static inline void ao_arch_restore_stack(void) {
- uint32_t sp;
- sp = (uint32_t) ao_cur_task->sp;
-
/* Switch stacks */
- asm("mov sp, %0" : : "r" (sp) );
+ asm("mov sp, %0" : : "r" (ao_cur_task->sp32) );
/* Restore PRIMASK */
asm("pop {r0}");
#endif /* HAS_TASK */
-#define ao_arch_wait_interrupt() do { \
- asm(".global ao_idle_loc\n\twfi\nao_idle_loc:"); \
- ao_arch_release_interrupts(); \
- ao_arch_block_interrupts(); \
+#define ao_arch_wait_interrupt() do { \
+ asm("\twfi\n"); \
+ ao_arch_release_interrupts(); \
+ asm(".global ao_idle_loc\n\nao_idle_loc:"); \
+ ao_arch_block_interrupts(); \
} while (0)
-#define ao_arch_critical(b) do { \
- ao_arch_block_interrupts(); \
- do { b } while (0); \
- ao_arch_release_interrupts(); \
+#define ao_arch_critical(b) do { \
+ uint32_t __mask = ao_arch_irqsave(); \
+ do { b } while (0); \
+ ao_arch_irqrestore(__mask); \
} while (0)
/*
ao_spi_put(bus); \
} while (0)
-#define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
-#define ao_spi_put_bit(reg,bit,pin,bus) ao_spi_put_mask(reg,(1<<bit),bus)
+#define ao_spi_get_bit(reg,bit,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
+#define ao_spi_put_bit(reg,bit,bus) ao_spi_put_mask(reg,(1<<bit),bus)
void
ao_spi_get(uint8_t spi_index, uint32_t speed);
ao_spi_put(uint8_t spi_index);
void
-ao_spi_send(void *block, uint16_t len, uint8_t spi_index);
+ao_spi_send(const void *block, uint16_t len, uint8_t spi_index);
void
ao_spi_send_fixed(uint8_t value, uint16_t len, uint8_t spi_index);
ao_spi_recv(void *block, uint16_t len, uint8_t spi_index);
void
-ao_spi_duplex(void *out, void *in, uint16_t len, uint8_t spi_index);
-
-extern uint16_t ao_spi_speed[LPC_NUM_SPI];
+ao_spi_duplex(const void *out, void *in, uint16_t len, uint8_t spi_index);
void
ao_spi_init(void);
+static inline void
+ao_spi_send_sync(const void *block, uint16_t len, uint8_t spi_index)
+{
+ ao_spi_send(block, len, spi_index);
+}
+
+static inline void ao_spi_send_byte(uint8_t byte, uint8_t spi_index)
+{
+ struct lpc_ssp *lpc_ssp;
+ switch (spi_index) {
+ case 0:
+ lpc_ssp = &lpc_ssp0;
+ break;
+ case 1:
+ lpc_ssp = &lpc_ssp1;
+ break;
+ }
+ lpc_ssp->dr = byte;
+ while ((lpc_ssp->sr & (1 << LPC_SSP_SR_RNE)) == 0);
+ (void) lpc_ssp->dr;
+}
+
#define ao_spi_init_cs(port, mask) do { \
uint8_t __bit__; \
for (__bit__ = 0; __bit__ < 32; __bit__++) { \
if (mask & (1 << __bit__)) \
- ao_enable_output(port, __bit__, PIN, 1); \
+ ao_enable_output(port, __bit__, 1); \
} \
} while (0)
+void
+ao_debug_out(char c);
+
#define HAS_ARCH_START_SCHEDULER 1
static inline void ao_arch_start_scheduler(void) {
asm("isb");
}
+void start(void);
+
#endif /* _AO_ARCH_FUNCS_H_ */