flash/nor/efm32: Use Cortex-M 'core_info' field

[fw/openocd] / src / flash / nor / xmc1xxx.c

diff --git a/src/flash/nor/xmc1xxx.c b/src/flash/nor/xmc1xxx.c
index 11542ac5bb16e9a7aef21c4438aed077a3aa9991..9e5f0a3ddd7ce2937ed07380b2eab62112e9bb9b 100644 (file)
--- a/src/flash/nor/xmc1xxx.c
+++ b/src/flash/nor/xmc1xxx.c
@@ -11,6 +11,7 @@
 #endif
 
 #include "imp.h"
+#include <helper/align.h>
 #include <helper/binarybuffer.h>
 #include <target/algorithm.h>
 #include <target/armv7m.h>
@@ -140,9 +141,6 @@ static int xmc1xxx_erase(struct flash_bank *bank, unsigned int first,
                goto err_run;
        }
 
-       for (unsigned int sector = first; sector <= last; sector++)
-               bank->sectors[sector].is_erased = 1;
-
 err_run:
        for (i = 0; i < ARRAY_SIZE(reg_params); i++)
                destroy_reg_param(&reg_params[i]);
@@ -256,12 +254,12 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
        LOG_DEBUG("Infineon XMC1000 write at 0x%08" PRIx32 " (%" PRIu32 " bytes)",
                offset, byte_count);
 
-       if (offset & (NVM_BLOCK_SIZE - 1)) {
+       if (!IS_ALIGNED(offset, NVM_BLOCK_SIZE)) {
                LOG_ERROR("offset 0x%" PRIx32 " breaks required block alignment",
                        offset);
                return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
        }
-       if (byte_count & (NVM_BLOCK_SIZE - 1)) {
+       if (!IS_ALIGNED(byte_count, NVM_BLOCK_SIZE)) {
                LOG_WARNING("length %" PRIu32 " is not block aligned, rounding up",
                        byte_count);
        }