flash: fix typos and duplicated words

[fw/openocd] / src / flash / nand / lpc32xx.c

diff --git a/src/flash/nand/lpc32xx.c b/src/flash/nand/lpc32xx.c
index 058d9a50ee5efc6f9ea91104429a1b64cb9dc42b..d516522f3de000b3557f6a752a1a6006c1a64909 100644 (file)
--- a/src/flash/nand/lpc32xx.c
+++ b/src/flash/nand/lpc32xx.c
@@ -42,7 +42,7 @@ extern int nand_correct_data(struct nand_device *nand, u_char *dat,
  * read/write data to the SLC controller.
  * - DMA descriptors will be put at start of working area,
  * - Hardware generated ECC will be stored at ECC_OFFS
- * - OOB wil be read/written from/to SPARE_OFFS
+ * - OOB will be read/written from/to SPARE_OFFS
  * - Actual page data will be read from/to DATA_OFFS
  * There are unused holes between the used areas.
  */
@@ -317,7 +317,7 @@ static int lpc32xx_init(struct nand_device *nand)
                }
 
                /* after reset set other registers of SLC,
-                * so reset calling is here at the begining
+                * so reset calling is here at the beginning
                 */
                retval = lpc32xx_reset(nand);
                if (ERROR_OK != retval)
@@ -769,7 +769,7 @@ static int lpc32xx_make_dma_list(uint32_t target_mem_base, uint32_t page_size,
         * 2. Copy generated ECC data from Register to Spare Area
         * 3. X'fer next 256 bytes of data from Memory to Flash.
         * 4. Copy generated ECC data from Register to Spare Area.
-        * 5. X'fer 16 byets of Spare area from Memory to Flash.
+        * 5. X'fer 16 bytes of Spare area from Memory to Flash.
         * Read Operation Sequence for Small Block NAND
         * ----------------------------------------------------------
         * 1. X'fer 256 bytes of data from Flash to Memory.
@@ -779,13 +779,13 @@ static int lpc32xx_make_dma_list(uint32_t target_mem_base, uint32_t page_size,
         * 5. X'fer 16 bytes of Spare area from Flash to Memory.
         * Write Operation Sequence for Large Block NAND
         * ----------------------------------------------------------
-        * 1. Steps(1-4) of Write Operations repeate for four times
+        * 1. Steps(1-4) of Write Operations repeated for four times
         * which generates 16 DMA descriptors to X'fer 2048 bytes of
         * data & 32 bytes of ECC data.
         * 2. X'fer 64 bytes of Spare area from Memory to Flash.
         * Read Operation Sequence for Large Block NAND
         * ----------------------------------------------------------
-        * 1. Steps(1-4) of Read Operations repeate for four times
+        * 1. Steps(1-4) of Read Operations repeated for four times
         * which generates 16 DMA descriptors to X'fer 2048 bytes of
         * data & 32 bytes of ECC data.
         * 2. X'fer 64 bytes of Spare area from Flash to Memory.
@@ -842,7 +842,7 @@ static int lpc32xx_make_dma_list(uint32_t target_mem_base, uint32_t page_size,
         * 2. Copy generated ECC data from Register to Spare Area
         * 3. X'fer next 256 bytes of data from Memory to Flash.
         * 4. Copy generated ECC data from Register to Spare Area.
-        * 5. X'fer 16 byets of Spare area from Memory to Flash.
+        * 5. X'fer 16 bytes of Spare area from Memory to Flash.
         * Read Operation Sequence for Small Block NAND
         * ----------------------------------------------------------
         * 1. X'fer 256 bytes of data from Flash to Memory.
@@ -852,13 +852,13 @@ static int lpc32xx_make_dma_list(uint32_t target_mem_base, uint32_t page_size,
         * 5. X'fer 16 bytes of Spare area from Flash to Memory.
         * Write Operation Sequence for Large Block NAND
         * ----------------------------------------------------------
-        * 1. Steps(1-4) of Write Operations repeate for four times
+        * 1. Steps(1-4) of Write Operations repeated for four times
         * which generates 16 DMA descriptors to X'fer 2048 bytes of
         * data & 32 bytes of ECC data.
         * 2. X'fer 64 bytes of Spare area from Memory to Flash.
         * Read Operation Sequence for Large Block NAND
         * ----------------------------------------------------------
-        * 1. Steps(1-4) of Read Operations repeate for four times
+        * 1. Steps(1-4) of Read Operations repeated for four times
         * which generates 16 DMA descriptors to X'fer 2048 bytes of
         * data & 32 bytes of ECC data.
         * 2. X'fer 64 bytes of Spare area from Flash to Memory.
@@ -1044,7 +1044,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
 
        target_mem_base = pworking_area->address;
        /*
-        * Skip writting page which has all 0xFF data as this will
+        * Skip writing page which has all 0xFF data as this will
         * generate 0x0 value.
         */
        if (data && !oob) {
@@ -1102,7 +1102,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
                        return retval;
                }
 
-               /* Write first decriptor to DMA controller */
+               /* Write first descriptor to DMA controller */
                retval = target_write_memory(target, 0x31000100, 4,
                                sizeof(dmac_ll_t) / 4,
                                (uint8_t *)dmalist);
@@ -1159,7 +1159,7 @@ static int lpc32xx_write_page_slc(struct nand_device *nand,
                return retval;
        }
 
-       /* Write OOB decriptor to DMA controller */
+       /* Write OOB descriptor to DMA controller */
        retval = target_write_memory(target, 0x31000100, 4,
                        sizeof(dmac_ll_t) / 4,
                        (uint8_t *)(&dmalist[nll-1]));
@@ -1487,7 +1487,7 @@ static int lpc32xx_read_page_slc(struct nand_device *nand,
                return retval;
        }
 
-       /* Write first decriptor to DMA controller */
+       /* Write first descriptor to DMA controller */
        retval = target_write_memory(target, 0x31000100, 4,
                        sizeof(dmac_ll_t) / 4, (uint8_t *)dmalist);
        if (ERROR_OK != retval) {