*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
#include <ao.h>
#include <ao_cc1120.h>
#include <ao_exti.h>
+#include <ao_fec.h>
+#include <ao_packet.h>
-uint8_t ao_radio_wake;
-uint8_t ao_radio_mutex;
-uint8_t ao_radio_abort;
+#define AO_RADIO_MAX_RECV sizeof(struct ao_packet)
+#define AO_RADIO_MAX_SEND sizeof(struct ao_packet)
-#define CC1120_DEBUG 1
+static uint8_t ao_radio_mutex;
-uint32_t ao_radio_cal = 0x6ca333;
+static uint8_t ao_radio_wake; /* radio ready. Also used as sleep address */
+static uint8_t ao_radio_abort; /* radio operation should abort */
+static uint8_t ao_radio_mcu_wake; /* MARC status change */
+static uint8_t ao_radio_marc_status; /* Last read MARC status value */
+static uint8_t ao_radio_tx_finished; /* MARC status indicates TX finished */
+
+int8_t ao_radio_rssi; /* Last received RSSI value */
+
+#define CC1120_DEBUG AO_FEC_DEBUG
+#define CC1120_TRACE 0
+
+extern const uint32_t ao_radio_cal;
#define FOSC 32000000
-#define ao_radio_select() ao_spi_get_mask(AO_CC1120_SPI_CS_PORT,(1 << AO_CC1120_SPI_CS_PIN),AO_CC1120_SPI_BUS)
+#define ao_radio_try_select(task_id) ao_spi_try_get_mask(AO_CC1120_SPI_CS_PORT,(1 << AO_CC1120_SPI_CS_PIN),AO_CC1120_SPI_BUS,AO_SPI_SPEED_4MHz, task_id)
+#define ao_radio_select() ao_spi_get_mask(AO_CC1120_SPI_CS_PORT,(1 << AO_CC1120_SPI_CS_PIN),AO_CC1120_SPI_BUS,AO_SPI_SPEED_4MHz)
#define ao_radio_deselect() ao_spi_put_mask(AO_CC1120_SPI_CS_PORT,(1 << AO_CC1120_SPI_CS_PIN),AO_CC1120_SPI_BUS)
+#define ao_radio_spi_start_bytes() ao_spi_start_bytes(AO_CC1120_SPI_BUS)
+#define ao_radio_spi_stop_bytes() ao_spi_stop_bytes(AO_CC1120_SPI_BUS)
+#define ao_radio_spi_send_byte(b) ao_spi_send_byte(b, AO_CC1120_SPI_BUS)
+#define ao_radio_spi_recv_byte() ao_spi_recv_byte(AO_CC1120_SPI_BUS)
#define ao_radio_spi_send(d,l) ao_spi_send((d), (l), AO_CC1120_SPI_BUS)
#define ao_radio_spi_send_fixed(d,l) ao_spi_send_fixed((d), (l), AO_CC1120_SPI_BUS)
#define ao_radio_spi_recv(d,l) ao_spi_recv((d), (l), AO_CC1120_SPI_BUS)
uint8_t data[2];
uint8_t d;
-#if CC1120_DEBUG
+#if CC1120_TRACE
printf("\t\tao_radio_reg_read (%04x): ", addr); flush();
#endif
if (CC1120_IS_EXTENDED(addr)) {
ao_radio_spi_send(data, d);
ao_radio_spi_recv(data, 1);
ao_radio_deselect();
-#if CC1120_DEBUG
+#if CC1120_TRACE
printf (" %02x\n", data[0]);
#endif
return data[0];
uint8_t data[3];
uint8_t d;
-#if CC1120_DEBUG
+#if CC1120_TRACE
printf("\t\tao_radio_reg_write (%04x): %02x\n", addr, value);
#endif
if (CC1120_IS_EXTENDED(addr)) {
ao_radio_deselect();
}
+static void
+_ao_radio_burst_read_start (uint16_t addr)
+{
+ ao_radio_spi_start_bytes();
+
+ if (CC1120_IS_EXTENDED(addr)) {
+ ao_radio_spi_send_byte((1 << CC1120_READ) |
+ (1 << CC1120_BURST) |
+ CC1120_EXTENDED);
+ } else {
+ addr |= ((1 << CC1120_READ) |
+ (1 << CC1120_BURST));
+ }
+ ao_radio_spi_send_byte(addr);
+}
+
+static void
+ao_radio_burst_read_stop (void)
+{
+ ao_radio_spi_stop_bytes();
+ ao_radio_deselect();
+}
+
+
static uint8_t
ao_radio_strobe(uint8_t addr)
{
uint8_t in;
-#if CC1120_DEBUG
+#if CC1120_TRACE
printf("\t\tao_radio_strobe (%02x): ", addr); flush();
#endif
ao_radio_select();
ao_radio_duplex(&addr, &in, 1);
ao_radio_deselect();
-#if CC1120_DEBUG
- printf("%02x\n", in);
+#if CC1120_TRACE
+ printf("%02x\n", in); flush();
#endif
return in;
}
+#if 0
static uint8_t
ao_radio_fifo_read(uint8_t *data, uint8_t len)
{
ao_radio_deselect();
return status;
}
+#endif
static uint8_t
-ao_radio_fifo_write(uint8_t *data, uint8_t len)
+ao_radio_fifo_write_start(void)
{
uint8_t addr = ((0 << CC1120_READ) |
(1 << CC1120_BURST) |
ao_radio_select();
ao_radio_duplex(&addr, &status, 1);
- ao_radio_spi_send(data, len);
+ return status;
+}
+
+static inline void ao_radio_fifo_write_stop(void) {
ao_radio_deselect();
+}
+
+static uint8_t
+ao_radio_fifo_write(uint8_t *data, uint8_t len)
+{
+ uint8_t status = ao_radio_fifo_write_start();
+ ao_radio_spi_send(data, len);
+ ao_radio_fifo_write_stop();
return status;
}
static uint8_t
ao_radio_fifo_write_fixed(uint8_t data, uint8_t len)
{
- uint8_t addr = ((0 << CC1120_READ) |
- (1 << CC1120_BURST) |
- CC1120_FIFO);
- uint8_t status;
-
- printf ("num tx bytes: %d\n", ao_radio_reg_read(CC1120_NUM_TXBYTES));
- ao_radio_select();
- ao_radio_duplex(&addr, &status, 1);
+ uint8_t status = ao_radio_fifo_write_start();
ao_radio_spi_send_fixed(data, len);
- ao_radio_deselect();
- printf ("num tx bytes: %d\n", ao_radio_reg_read(CC1120_NUM_TXBYTES));
+ ao_radio_fifo_write_stop();
return status;
}
+static uint8_t
+ao_radio_int_pin(void)
+{
+ return ao_gpio_get(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN, AO_CC1120_INT);
+}
+
+#if CC1120_DEBUG
static uint8_t
ao_radio_status(void)
{
return ao_radio_strobe (CC1120_SNOP);
}
+#endif
void
ao_radio_recv_abort(void)
#define ao_radio_rdf_value 0x55
+static uint8_t
+ao_radio_get_marc_status(void)
+{
+ return ao_radio_reg_read(CC1120_MARC_STATUS1);
+}
+
+static void
+ao_radio_mcu_wakeup_isr(void)
+{
+ ao_radio_mcu_wake = 1;
+ ao_wakeup(&ao_radio_wake);
+}
+
+
+static void
+ao_radio_check_marc_status(void)
+{
+ ao_radio_mcu_wake = 0;
+ ao_radio_marc_status = ao_radio_get_marc_status();
+
+ /* Anyt other than 'tx/rx finished' means an error occurred */
+ if (ao_radio_marc_status & ~(CC1120_MARC_STATUS1_TX_FINISHED|CC1120_MARC_STATUS1_RX_FINISHED))
+ ao_radio_abort = 1;
+ if (ao_radio_marc_status & (CC1120_MARC_STATUS1_TX_FINISHED))
+ ao_radio_tx_finished = 1;
+}
+
+static void
+ao_radio_isr(void)
+{
+ ao_exti_disable(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
+ ao_radio_wake = 1;
+ ao_wakeup(&ao_radio_wake);
+}
+
+static void
+ao_radio_enable_isr(void)
+{
+ ao_exti_enable(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
+ ao_exti_enable(AO_CC1120_MCU_WAKEUP_PORT, AO_CC1120_MCU_WAKEUP_PIN);
+}
+
+static void
+ao_radio_start_tx(void)
+{
+ ao_exti_set_callback(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN, ao_radio_isr);
+ ao_radio_tx_finished = 0;
+ ao_radio_strobe(CC1120_STX);
+}
+
+static void
+ao_radio_idle(void)
+{
+ for (;;) {
+ uint8_t state = (ao_radio_strobe(CC1120_SIDLE) >> CC1120_STATUS_STATE) & CC1120_STATUS_STATE_MASK;
+ if (state == CC1120_STATUS_STATE_IDLE)
+ break;
+ if (state == CC1120_STATUS_STATE_TX_FIFO_ERROR)
+ ao_radio_strobe(CC1120_SFTX);
+ if (state == CC1120_STATUS_STATE_RX_FIFO_ERROR)
+ ao_radio_strobe(CC1120_SFRX);
+ }
+ /* Flush any pending TX bytes */
+ ao_radio_strobe(CC1120_SFTX);
+}
+
+/*
+ * Packet deviation
+ *
+ * fdev = fosc >> 24 * (256 + dev_m) << dev_e
+ *
+ * Deviation for 38400 baud should be 20.5kHz:
+ *
+ * 32e6Hz / (2 ** 24) * (256 + 80) * (2 ** 5) = 20508Hz
+ *
+ * Deviation for 9600 baud should be 5.125kHz:
+ *
+ * 32e6Hz / (2 ** 24) * (256 + 80) * (2 ** 3) = 5127Hz
+ *
+ * Deviation for 2400 baud should be 1.28125kHz, but cc1111 and
+ * cc115l can't do that, so we'll use 1.5kHz instead:
+ *
+ * 32e6Hz / (2 ** 24) * (256 + 137) * (2 ** 1) = 1499Hz
+ */
+
+#define PACKET_DEV_M_384 80
+#define PACKET_DEV_E_384 5
+
+#define PACKET_DEV_M_96 80
+#define PACKET_DEV_E_96 3
+
+#define PACKET_DEV_M_24 137
+#define PACKET_DEV_E_24 1
+
+/*
+ * For our packet data
+ *
+ * (2**20 + DATARATE_M) * 2 ** DATARATE_E
+ * Rdata = -------------------------------------- * fosc
+ * 2 ** 39
+ *
+ * Given the bit period of the baseband, T, the bandwidth of the
+ * baseband signal is B = 1/(2T). The overall bandwidth of the
+ * modulated signal is then Channel bandwidth = 2Δf + 2B.
+ *
+ * 38400 -- 2 * 20500 + 38400 = 79.4 kHz
+ * 9600 -- 2 * 5.125 + 9600 = 19.9 kHz
+ * 2400 -- 2 * 1.5 + 2400 = 5.4 khz
+ *
+ * Symbol rate 38400 Baud:
+ *
+ * DATARATE_M = 239914
+ * DATARATE_E = 9
+ * CHANBW = 79.4 (round to 100)
+ *
+ * Symbol rate 9600 Baud:
+ *
+ * DATARATE_M = 239914
+ * DATARATE_E = 7
+ * CHANBW = 19.9 (round to 20)
+ *
+ * Symbol rate 2400 Baud:
+ *
+ * DATARATE_M = 239914
+ * DATARATE_E = 5
+ * CHANBW = 5.0 (round to 8.0)
+ */
+
+#define PACKET_DRATE_M 239914
+
+#define PACKET_DRATE_E_384 9
+
+/* 200 / 2 = 100 */
+#define PACKET_CHAN_BW_384 ((0 << CC1120_CHAN_BW_CHFILT_BYPASS) | \
+ (CC1120_CHAN_BW_ADC_CIC_DECFACT_20 << CC1120_CHAN_BW_ADC_CIC_DECFACT) | \
+ (2 << CC1120_CHAN_BW_BB_CIC_DECFACT))
+
+#define PACKET_DRATE_E_96 7
+/* 200 / 10 = 20 */
+#define PACKET_CHAN_BW_96 ((0 << CC1120_CHAN_BW_CHFILT_BYPASS) | \
+ (CC1120_CHAN_BW_ADC_CIC_DECFACT_20 << CC1120_CHAN_BW_ADC_CIC_DECFACT) | \
+ (10 << CC1120_CHAN_BW_BB_CIC_DECFACT))
+
+#define PACKET_DRATE_E_24 5
+/* 200 / 25 = 8 */
+#define PACKET_CHAN_BW_24 ((0 << CC1120_CHAN_BW_CHFILT_BYPASS) | \
+ (CC1120_CHAN_BW_ADC_CIC_DECFACT_20 << CC1120_CHAN_BW_ADC_CIC_DECFACT) | \
+ (25 << CC1120_CHAN_BW_BB_CIC_DECFACT))
+
+static const uint16_t packet_setup[] = {
+ CC1120_DRATE1, ((PACKET_DRATE_M >> 8) & 0xff),
+ CC1120_DRATE0, ((PACKET_DRATE_M >> 0) & 0xff),
+ CC1120_PKT_CFG2, ((CC1120_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1120_PKT_CFG2_CCA_MODE) |
+ (CC1120_PKT_CFG2_PKT_FORMAT_NORMAL << CC1120_PKT_CFG2_PKT_FORMAT)),
+ CC1120_PKT_CFG1, ((0 << CC1120_PKT_CFG1_WHITE_DATA) |
+ (CC1120_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1120_PKT_CFG1_ADDR_CHECK_CFG) |
+ (CC1120_PKT_CFG1_CRC_CFG_DISABLED << CC1120_PKT_CFG1_CRC_CFG) |
+ (0 << CC1120_PKT_CFG1_APPEND_STATUS)),
+ CC1120_PKT_CFG0, ((0 << CC1120_PKT_CFG0_RESERVED7) |
+ (CC1120_PKT_CFG0_LENGTH_CONFIG_FIXED << CC1120_PKT_CFG0_LENGTH_CONFIG) |
+ (0 << CC1120_PKT_CFG0_PKG_BIT_LEN) |
+ (0 << CC1120_PKT_CFG0_UART_MODE_EN) |
+ (0 << CC1120_PKT_CFG0_UART_SWAP_EN)),
+ CC1120_PREAMBLE_CFG1, ((CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_4_BYTES << CC1120_PREAMBLE_CFG1_NUM_PREAMBLE) |
+ (CC1120_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1120_PREAMBLE_CFG1_PREAMBLE_WORD)),
+ AO_CC1120_MARC_GPIO_IOCFG, CC1120_IOCFG_GPIO_CFG_MARC_MCU_WAKEUP,
+};
+
+static const uint16_t packet_setup_384[] = {
+ CC1120_DEVIATION_M, PACKET_DEV_M_384,
+ CC1120_MODCFG_DEV_E, ((CC1120_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1120_MODCFG_DEV_E_MODEM_MODE) |
+ (CC1120_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1120_MODCFG_DEV_E_MOD_FORMAT) |
+ (PACKET_DEV_E_384 << CC1120_MODCFG_DEV_E_DEV_E)),
+ CC1120_DRATE2, ((PACKET_DRATE_E_384 << CC1120_DRATE2_DATARATE_E) |
+ (((PACKET_DRATE_M >> 16) & CC1120_DRATE2_DATARATE_M_19_16_MASK) << CC1120_DRATE2_DATARATE_M_19_16)),
+ CC1120_CHAN_BW, PACKET_CHAN_BW_384,
+ CC1120_PA_CFG0, 0x7b,
+};
+
+static const uint16_t packet_setup_96[] = {
+ CC1120_DEVIATION_M, PACKET_DEV_M_96,
+ CC1120_MODCFG_DEV_E, ((CC1120_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1120_MODCFG_DEV_E_MODEM_MODE) |
+ (CC1120_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1120_MODCFG_DEV_E_MOD_FORMAT) |
+ (PACKET_DEV_E_96 << CC1120_MODCFG_DEV_E_DEV_E)),
+ CC1120_DRATE2, ((PACKET_DRATE_E_96 << CC1120_DRATE2_DATARATE_E) |
+ (((PACKET_DRATE_M >> 16) & CC1120_DRATE2_DATARATE_M_19_16_MASK) << CC1120_DRATE2_DATARATE_M_19_16)),
+ CC1120_CHAN_BW, PACKET_CHAN_BW_96,
+ CC1120_PA_CFG0, 0x7d,
+};
+
+static const uint16_t packet_setup_24[] = {
+ CC1120_DEVIATION_M, PACKET_DEV_M_24,
+ CC1120_MODCFG_DEV_E, ((CC1120_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1120_MODCFG_DEV_E_MODEM_MODE) |
+ (CC1120_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1120_MODCFG_DEV_E_MOD_FORMAT) |
+ (PACKET_DEV_E_24 << CC1120_MODCFG_DEV_E_DEV_E)),
+ CC1120_DRATE2, ((PACKET_DRATE_E_24 << CC1120_DRATE2_DATARATE_E) |
+ (((PACKET_DRATE_M >> 16) & CC1120_DRATE2_DATARATE_M_19_16_MASK) << CC1120_DRATE2_DATARATE_M_19_16)),
+ CC1120_CHAN_BW, PACKET_CHAN_BW_24,
+ CC1120_PA_CFG0, 0x7e,
+};
+
+#define AO_CC1120_TX_BUFFER 64
+
+static const uint16_t packet_tx_setup[] = {
+ CC1120_PKT_CFG2, ((CC1120_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1120_PKT_CFG2_CCA_MODE) |
+ (CC1120_PKT_CFG2_PKT_FORMAT_NORMAL << CC1120_PKT_CFG2_PKT_FORMAT)),
+ CC1120_FIFO_CFG, ((0 << CC1120_FIFO_CFG_CRC_AUTOFLUSH) |
+ (AO_CC1120_TX_BUFFER << CC1120_FIFO_CFG_FIFO_THR)),
+};
+
+static const uint16_t packet_rx_setup[] = {
+ CC1120_PKT_CFG2, ((CC1120_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1120_PKT_CFG2_CCA_MODE) |
+ (CC1120_PKT_CFG2_PKT_FORMAT_SYNCHRONOUS_SERIAL << CC1120_PKT_CFG2_PKT_FORMAT)),
+ AO_CC1120_INT_GPIO_IOCFG, CC1120_IOCFG_GPIO_CFG_CLKEN_SOFT,
+};
+
/*
* RDF deviation is 5kHz
*
/*
* For our RDF beacon, set the symbol rate to 2kBaud (for a 1kHz tone)
*
- * (2**20 - DATARATE_M) * 2 ** DATARATE_E
+ * (2**20 + DATARATE_M) * 2 ** DATARATE_E
* Rdata = -------------------------------------- * fosc
* 2 ** 39
*
- * DATARATE_M = 511705
- * DATARATE_E = 6
+ * DATARATE_M = 25166
+ * DATARATE_E = 5
*
* To make the tone last for 200ms, we need 2000 * .2 = 400 bits or 50 bytes
*/
(0 << CC1120_PKT_CFG0_PKG_BIT_LEN) |
(0 << CC1120_PKT_CFG0_UART_MODE_EN) |
(0 << CC1120_PKT_CFG0_UART_SWAP_EN)),
+ CC1120_PREAMBLE_CFG1, ((CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_NONE << CC1120_PREAMBLE_CFG1_NUM_PREAMBLE) |
+ (CC1120_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1120_PREAMBLE_CFG1_PREAMBLE_WORD)),
+ CC1120_PA_CFG0, 0x7e,
};
-#define int_pin(w) printf("\t%s: %d\n", \
- w,\
- (AO_CC1120_INT_PORT.idr >> AO_CC1120_INT_PIN) & 1)
+/*
+ * APRS deviation is 3kHz
+ *
+ * fdev = fosc >> 24 * (256 + dev_m) << dev_e
+ *
+ * 32e6Hz / (2 ** 24) * (256 + 137) * (2 ** 2) = 2998Hz
+ */
-static uint8_t
-ao_radio_marc_status(void)
+#define APRS_DEV_E 2
+#define APRS_DEV_M 137
+
+/*
+ * For our APRS beacon, set the symbol rate to 9.6kBaud (8x oversampling for 1200 baud data rate)
+ *
+ * (2**20 + DATARATE_M) * 2 ** DATARATE_E
+ * Rdata = -------------------------------------- * fosc
+ * 2 ** 39
+ *
+ * DATARATE_M = 239914
+ * DATARATE_E = 7
+ *
+ * Rdata = 9599.998593330383301
+ *
+ */
+#define APRS_DRATE_E 7
+#define APRS_DRATE_M 239914
+
+static const uint16_t aprs_setup[] = {
+ CC1120_DEVIATION_M, APRS_DEV_M,
+ CC1120_MODCFG_DEV_E, ((CC1120_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1120_MODCFG_DEV_E_MODEM_MODE) |
+ (CC1120_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1120_MODCFG_DEV_E_MOD_FORMAT) |
+ (APRS_DEV_E << CC1120_MODCFG_DEV_E_DEV_E)),
+ CC1120_DRATE2, ((APRS_DRATE_E << CC1120_DRATE2_DATARATE_E) |
+ (((APRS_DRATE_M >> 16) & CC1120_DRATE2_DATARATE_M_19_16_MASK) << CC1120_DRATE2_DATARATE_M_19_16)),
+ CC1120_DRATE1, ((APRS_DRATE_M >> 8) & 0xff),
+ CC1120_DRATE0, ((APRS_DRATE_M >> 0) & 0xff),
+ CC1120_PKT_CFG2, ((CC1120_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1120_PKT_CFG2_CCA_MODE) |
+ (CC1120_PKT_CFG2_PKT_FORMAT_NORMAL << CC1120_PKT_CFG2_PKT_FORMAT)),
+ CC1120_PKT_CFG1, ((0 << CC1120_PKT_CFG1_WHITE_DATA) |
+ (CC1120_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1120_PKT_CFG1_ADDR_CHECK_CFG) |
+ (CC1120_PKT_CFG1_CRC_CFG_DISABLED << CC1120_PKT_CFG1_CRC_CFG) |
+ (0 << CC1120_PKT_CFG1_APPEND_STATUS)),
+ CC1120_PREAMBLE_CFG1, ((CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_NONE << CC1120_PREAMBLE_CFG1_NUM_PREAMBLE) |
+ (CC1120_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1120_PREAMBLE_CFG1_PREAMBLE_WORD)),
+ CC1120_PA_CFG0, 0x7d,
+ CC1120_FIFO_CFG, ((0 << CC1120_FIFO_CFG_CRC_AUTOFLUSH) |
+ (AO_CC1120_TX_BUFFER << CC1120_FIFO_CFG_FIFO_THR)),
+};
+
+/*
+ * For Test mode, we want an unmodulated carrier. To do that, we
+ * set the deviation to zero and enable a preamble so that the radio
+ * turns on before we send any data
+ */
+
+static const uint16_t test_setup[] = {
+ CC1120_DEVIATION_M, 0,
+ CC1120_MODCFG_DEV_E, ((CC1120_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1120_MODCFG_DEV_E_MODEM_MODE) |
+ (CC1120_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1120_MODCFG_DEV_E_MOD_FORMAT) |
+ (0 << CC1120_MODCFG_DEV_E_DEV_E)),
+ CC1120_DRATE2, ((APRS_DRATE_E << CC1120_DRATE2_DATARATE_E) |
+ (((APRS_DRATE_M >> 16) & CC1120_DRATE2_DATARATE_M_19_16_MASK) << CC1120_DRATE2_DATARATE_M_19_16)),
+ CC1120_DRATE1, ((APRS_DRATE_M >> 8) & 0xff),
+ CC1120_DRATE0, ((APRS_DRATE_M >> 0) & 0xff),
+ CC1120_PKT_CFG2, ((CC1120_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1120_PKT_CFG2_CCA_MODE) |
+ (CC1120_PKT_CFG2_PKT_FORMAT_NORMAL << CC1120_PKT_CFG2_PKT_FORMAT)),
+ CC1120_PKT_CFG1, ((0 << CC1120_PKT_CFG1_WHITE_DATA) |
+ (CC1120_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1120_PKT_CFG1_ADDR_CHECK_CFG) |
+ (CC1120_PKT_CFG1_CRC_CFG_DISABLED << CC1120_PKT_CFG1_CRC_CFG) |
+ (0 << CC1120_PKT_CFG1_APPEND_STATUS)),
+ CC1120_PREAMBLE_CFG1, ((CC1120_PREAMBLE_CFG1_NUM_PREAMBLE_4_BYTES << CC1120_PREAMBLE_CFG1_NUM_PREAMBLE) |
+ (CC1120_PREAMBLE_CFG1_PREAMBLE_WORD_AA << CC1120_PREAMBLE_CFG1_PREAMBLE_WORD)),
+};
+
+#define AO_PKT_CFG0_INFINITE ((0 << CC1120_PKT_CFG0_RESERVED7) | \
+ (CC1120_PKT_CFG0_LENGTH_CONFIG_INFINITE << CC1120_PKT_CFG0_LENGTH_CONFIG) | \
+ (0 << CC1120_PKT_CFG0_PKG_BIT_LEN) | \
+ (0 << CC1120_PKT_CFG0_UART_MODE_EN) | \
+ (0 << CC1120_PKT_CFG0_UART_SWAP_EN))
+
+#define AO_PKT_CFG0_FIXED ((0 << CC1120_PKT_CFG0_RESERVED7) | \
+ (CC1120_PKT_CFG0_LENGTH_CONFIG_FIXED << CC1120_PKT_CFG0_LENGTH_CONFIG) | \
+ (0 << CC1120_PKT_CFG0_PKG_BIT_LEN) | \
+ (0 << CC1120_PKT_CFG0_UART_MODE_EN) | \
+ (0 << CC1120_PKT_CFG0_UART_SWAP_EN))
+
+static uint16_t ao_radio_mode;
+
+#define AO_RADIO_MODE_BITS_PACKET 1
+#define AO_RADIO_MODE_BITS_PACKET_TX 2
+#define AO_RADIO_MODE_BITS_TX_BUF 4
+#define AO_RADIO_MODE_BITS_TX_FINISH 8
+#define AO_RADIO_MODE_BITS_PACKET_RX 16
+#define AO_RADIO_MODE_BITS_RDF 32
+#define AO_RADIO_MODE_BITS_APRS 64
+#define AO_RADIO_MODE_BITS_TEST 128
+#define AO_RADIO_MODE_BITS_INFINITE 256
+#define AO_RADIO_MODE_BITS_FIXED 512
+
+#define AO_RADIO_MODE_NONE 0
+#define AO_RADIO_MODE_PACKET_TX_BUF (AO_RADIO_MODE_BITS_PACKET | AO_RADIO_MODE_BITS_PACKET_TX | AO_RADIO_MODE_BITS_TX_BUF)
+#define AO_RADIO_MODE_PACKET_TX_FINISH (AO_RADIO_MODE_BITS_PACKET | AO_RADIO_MODE_BITS_PACKET_TX | AO_RADIO_MODE_BITS_TX_FINISH)
+#define AO_RADIO_MODE_PACKET_RX (AO_RADIO_MODE_BITS_PACKET | AO_RADIO_MODE_BITS_PACKET_RX)
+#define AO_RADIO_MODE_RDF (AO_RADIO_MODE_BITS_RDF | AO_RADIO_MODE_BITS_TX_FINISH)
+#define AO_RADIO_MODE_APRS_BUF (AO_RADIO_MODE_BITS_APRS | AO_RADIO_MODE_BITS_INFINITE | AO_RADIO_MODE_BITS_TX_BUF)
+#define AO_RADIO_MODE_APRS_LAST_BUF (AO_RADIO_MODE_BITS_APRS | AO_RADIO_MODE_BITS_FIXED | AO_RADIO_MODE_BITS_TX_BUF)
+#define AO_RADIO_MODE_APRS_FINISH (AO_RADIO_MODE_BITS_APRS | AO_RADIO_MODE_BITS_FIXED | AO_RADIO_MODE_BITS_TX_FINISH)
+#define AO_RADIO_MODE_TEST (AO_RADIO_MODE_BITS_TEST | AO_RADIO_MODE_BITS_INFINITE | AO_RADIO_MODE_BITS_TX_BUF)
+
+static void
+_ao_radio_set_regs(const uint16_t *regs, int nreg)
{
- return ao_radio_reg_read(CC1120_MARC_STATUS1);
+ int i;
+
+ for (i = 0; i < nreg; i++) {
+ ao_radio_reg_write(regs[0], regs[1]);
+ regs += 2;
+ }
}
-static uint8_t
-ao_radio_tx_done(void)
+#define ao_radio_set_regs(setup) _ao_radio_set_regs(setup, (sizeof (setup) / sizeof(setup[0])) >> 1)
+
+static void
+ao_radio_set_mode(uint16_t new_mode)
{
- return ao_radio_marc_status() == CC1120_MARC_STATUS1_TX_FINISHED;
+ uint16_t changes;
+
+ if (new_mode == ao_radio_mode)
+ return;
+
+ changes = new_mode & (~ao_radio_mode);
+
+ if (changes & AO_RADIO_MODE_BITS_PACKET) {
+ ao_radio_set_regs(packet_setup);
+
+ switch (ao_config.radio_rate) {
+ default:
+ case AO_RADIO_RATE_38400:
+ ao_radio_set_regs(packet_setup_384);
+ break;
+ case AO_RADIO_RATE_9600:
+ ao_radio_set_regs(packet_setup_96);
+ break;
+ case AO_RADIO_RATE_2400:
+ ao_radio_set_regs(packet_setup_24);
+ break;
+ }
+ }
+
+ if (changes & AO_RADIO_MODE_BITS_PACKET_TX)
+ ao_radio_set_regs(packet_tx_setup);
+
+ if (changes & AO_RADIO_MODE_BITS_TX_BUF)
+ ao_radio_reg_write(AO_CC1120_INT_GPIO_IOCFG, CC1120_IOCFG_GPIO_CFG_TXFIFO_THR);
+
+ if (changes & AO_RADIO_MODE_BITS_TX_FINISH)
+ ao_radio_reg_write(AO_CC1120_INT_GPIO_IOCFG, CC1120_IOCFG_GPIO_CFG_RX0TX1_CFG);
+
+ if (changes & AO_RADIO_MODE_BITS_PACKET_RX)
+ ao_radio_set_regs(packet_rx_setup);
+
+ if (changes & AO_RADIO_MODE_BITS_RDF)
+ ao_radio_set_regs(rdf_setup);
+
+ if (changes & AO_RADIO_MODE_BITS_APRS)
+ ao_radio_set_regs(aprs_setup);
+
+ if (changes & AO_RADIO_MODE_BITS_TEST)
+ ao_radio_set_regs(test_setup);
+
+ if (changes & AO_RADIO_MODE_BITS_INFINITE)
+ ao_radio_reg_write(CC1120_PKT_CFG0, AO_PKT_CFG0_INFINITE);
+
+ if (changes & AO_RADIO_MODE_BITS_FIXED)
+ ao_radio_reg_write(CC1120_PKT_CFG0, AO_PKT_CFG0_FIXED);
+
+ ao_radio_mode = new_mode;
}
-static uint8_t
-ao_radio_rx_done(void)
+static const uint16_t radio_setup[] = {
+#include "ao_cc1120_CC1120.h"
+};
+
+static uint8_t ao_radio_configured = 0;
+
+static void
+ao_radio_setup(void)
{
- return ao_radio_marc_status() == CC1120_MARC_STATUS1_RX_FINISHED;
+ ao_radio_strobe(CC1120_SRES);
+
+ ao_radio_set_regs(radio_setup);
+
+ ao_radio_mode = 0;
+
+ ao_config_get();
+
+ ao_radio_configured = 1;
}
-void
-ao_radio_rdf(uint8_t len)
+static void
+ao_radio_set_len(uint8_t len)
{
- int i;
+ static uint8_t last_len;
- ao_radio_get(len);
+ if (len != last_len) {
+ ao_radio_reg_write(CC1120_PKT_LEN, len);
+ last_len = len;
+ }
+}
+
+static void
+ao_radio_get(uint8_t len)
+{
+ static uint32_t last_radio_setting;
+ static uint8_t last_radio_rate;
+
+ ao_mutex_get(&ao_radio_mutex);
+
+ if (!ao_radio_configured)
+ ao_radio_setup();
+ if (ao_config.radio_setting != last_radio_setting) {
+ ao_radio_reg_write(CC1120_FREQ2, ao_config.radio_setting >> 16);
+ ao_radio_reg_write(CC1120_FREQ1, ao_config.radio_setting >> 8);
+ ao_radio_reg_write(CC1120_FREQ0, ao_config.radio_setting);
+ last_radio_setting = ao_config.radio_setting;
+ }
+ if (ao_config.radio_rate != last_radio_rate) {
+ ao_radio_mode &= ~AO_RADIO_MODE_BITS_PACKET;
+ last_radio_rate = ao_config.radio_rate;
+ }
+ ao_radio_set_len(len);
+}
+
+#define ao_radio_put() ao_mutex_put(&ao_radio_mutex)
+
+static void
+ao_rdf_start(uint8_t len)
+{
ao_radio_abort = 0;
- for (i = 0; i < sizeof (rdf_setup) / sizeof (rdf_setup[0]); i += 2)
- ao_radio_reg_write(rdf_setup[i], rdf_setup[i+1]);
- ao_radio_reg_write(CC1120_PKT_LEN, len);
- int_pin ("Before CFG");
- ao_radio_reg_write(CC1120_IOCFG2, CC1120_IOCFG_GPIO_CFG_RX0TX1_CFG);
- int_pin ("After CFG");
- ao_radio_strobe(CC1120_STX);
- ao_exti_enable(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
- int_pin ("After strobe");
- ao_delay(AO_MS_TO_TICKS(100));
- ao_radio_fifo_write_fixed(ao_radio_rdf_value, len);
- int_pin ("After delay");
- cli();
- for (i = 0; i < 20; i++) {
-#if CC1120_DEBUG
- ao_delay(AO_MS_TO_TICKS(50));
- int_pin ("Waited");
- printf ("Status %02x num_tx_bytes %d marc status %x\n",
- ao_radio_status(),
- ao_radio_reg_read(CC1120_NUM_TXBYTES),
- ao_radio_marc_status());
-#else
+ ao_radio_get(len);
+
+ ao_radio_set_mode(AO_RADIO_MODE_RDF);
+ ao_radio_wake = 0;
+
+}
+
+static void
+ao_rdf_run(void)
+{
+ ao_radio_start_tx();
+
+ ao_arch_block_interrupts();
+ while (!ao_radio_wake && !ao_radio_abort && !ao_radio_mcu_wake) {
+ ao_radio_enable_isr();
ao_sleep(&ao_radio_wake);
-#endif
}
- sei();
- printf ("num_tx_bytes %d marc status %x\n",
- ao_radio_reg_read(CC1120_NUM_TXBYTES),
- ao_radio_marc_status());
- if (!ao_radio_tx_done())
+ ao_arch_release_interrupts();
+ if (ao_radio_mcu_wake)
+ ao_radio_check_marc_status();
+ if (!ao_radio_wake)
ao_radio_idle();
- ao_radio_set_packet();
ao_radio_put();
}
+void
+ao_radio_rdf(void)
+{
+ ao_rdf_start(AO_RADIO_RDF_LEN);
+
+ ao_radio_fifo_write_fixed(ao_radio_rdf_value, AO_RADIO_RDF_LEN);
+
+ ao_rdf_run();
+}
+
+void
+ao_radio_continuity(uint8_t c)
+{
+ uint8_t i;
+
+ ao_rdf_start(AO_RADIO_CONT_TOTAL_LEN);
+
+ (void) ao_radio_fifo_write_start();
+ for (i = 0; i < 3; i++) {
+ ao_radio_spi_send_fixed(0x00, AO_RADIO_CONT_PAUSE_LEN);
+ if (i < c)
+ ao_radio_spi_send_fixed(ao_radio_rdf_value, AO_RADIO_CONT_TONE_LEN);
+ else
+ ao_radio_spi_send_fixed(0x00, AO_RADIO_CONT_TONE_LEN);
+ }
+ ao_radio_spi_send_fixed(0x00, AO_RADIO_CONT_PAUSE_LEN);
+ ao_radio_fifo_write_stop();
+ ao_rdf_run();
+}
+
void
ao_radio_rdf_abort(void)
{
}
static void
-ao_radio_test(void)
+ao_radio_test_cmd(void)
{
uint8_t mode = 2;
- uint8_t radio_on;
+ static uint8_t radio_on;
ao_cmd_white();
if (ao_cmd_lex_c != '\n') {
ao_cmd_decimal();
ao_packet_slave_stop();
#endif
ao_radio_get(0xff);
+ ao_radio_set_mode(AO_RADIO_MODE_TEST);
ao_radio_strobe(CC1120_STX);
-#if CC1120_DEBUG
- { int t;
+#if CC1120_TRACE
+ { int t;
for (t = 0; t < 10; t++) {
printf ("status: %02x\n", ao_radio_status());
ao_delay(AO_MS_TO_TICKS(100));
}
}
+static void
+ao_radio_wait_isr(uint16_t timeout)
+{
+ ao_arch_block_interrupts();
+ while (!ao_radio_wake && !ao_radio_mcu_wake && !ao_radio_abort)
+ if (ao_sleep_for(&ao_radio_wake, timeout))
+ ao_radio_abort = 1;
+ ao_arch_release_interrupts();
+ if (ao_radio_mcu_wake)
+ ao_radio_check_marc_status();
+}
+
+static void
+ao_radio_wait_fifo(void)
+{
+ while (ao_radio_int_pin() != 0 && !ao_radio_abort) {
+ ao_radio_wake = 0;
+ ao_radio_enable_isr();
+ ao_radio_wait_isr(0);
+ }
+}
+
+static uint8_t tx_data[(AO_RADIO_MAX_SEND + 4) * 2];
+
void
-ao_radio_send(void *d, uint8_t size)
+ao_radio_send(const void *d, uint8_t size)
{
- uint8_t marc_status;
+ uint8_t *e = tx_data;
+ uint8_t encode_len;
+ uint8_t this_len;
+ uint8_t started = 0;
- ao_radio_get(size);
- ao_radio_wake = 0;
- ao_radio_fifo_write(d, size);
- ao_exti_enable(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
- ao_radio_strobe(CC1120_STX);
- cli();
- for (;;) {
- if (ao_radio_wake) {
- marc_status = ao_radio_marc_status();
- if (marc_status != CC1120_MARC_STATUS1_NO_FAILURE)
+ encode_len = ao_fec_encode(d, size, tx_data);
+
+ ao_radio_get(encode_len);
+
+ ao_radio_abort = 0;
+
+ /* Flush any pending TX bytes */
+ ao_radio_strobe(CC1120_SFTX);
+
+ while (encode_len) {
+ this_len = encode_len;
+
+ if (started) {
+ ao_radio_wait_fifo();
+ if (ao_radio_abort)
break;
- ao_radio_wake = 0;
}
- ao_sleep(&ao_radio_wake);
+
+ if (this_len > AO_CC1120_TX_BUFFER) {
+ this_len = AO_CC1120_TX_BUFFER;
+ ao_radio_set_mode(AO_RADIO_MODE_PACKET_TX_BUF);
+ } else {
+ ao_radio_set_mode(AO_RADIO_MODE_PACKET_TX_FINISH);
+ }
+
+ ao_radio_fifo_write(e, this_len);
+ e += this_len;
+ encode_len -= this_len;
+
+ if (!started) {
+ ao_radio_start_tx();
+ started = 1;
+ }
+ }
+ while (started && !ao_radio_abort && !ao_radio_tx_finished) {
+ ao_radio_wake = 0;
+ ao_radio_enable_isr();
+ ao_radio_wait_isr(0);
}
- sei();
+ if (ao_radio_abort)
+ ao_radio_idle();
ao_radio_put();
}
-uint8_t
-ao_radio_recv(__xdata void *d, uint8_t size)
+void
+ao_radio_send_aprs(ao_radio_fill_func fill)
{
- uint8_t marc_status = CC1120_MARC_STATUS1_NO_FAILURE;
+ uint8_t buf[AO_CC1120_TX_BUFFER];
+ int cnt;
+ int total = 0;
+ uint8_t done = 0;
+ uint8_t started = 0;
- /* configure interrupt pin */
- ao_radio_get(size);
- ao_radio_wake = 0;
- ao_exti_enable(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
- ao_radio_strobe(CC1120_SRX);
- cli();
- for (;;) {
- if (ao_radio_abort)
- break;
- if (ao_radio_wake) {
- marc_status = ao_radio_marc_status();
- if (marc_status != CC1120_MARC_STATUS1_NO_FAILURE)
+ ao_radio_get(0xff);
+
+ ao_radio_abort = 0;
+
+ ao_exti_set_callback(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN, ao_radio_isr);
+ while (!done) {
+ cnt = (*fill)(buf, sizeof(buf));
+ if (cnt < 0) {
+ done = 1;
+ cnt = -cnt;
+ }
+ total += cnt;
+
+ /* Wait for some space in the fifo */
+ if (started) {
+ ao_radio_wait_fifo();
+ if (ao_radio_abort)
break;
- ao_radio_wake = 0;
}
- ao_sleep(&ao_radio_wake);
+
+ if (done) {
+ ao_radio_set_len(total & 0xff);
+ ao_radio_set_mode(AO_RADIO_MODE_APRS_FINISH);
+ } else
+ ao_radio_set_mode(AO_RADIO_MODE_APRS_BUF);
+
+ ao_radio_fifo_write(buf, cnt);
+
+ if (!started) {
+ ao_radio_start_tx();
+ started = 1;
+ }
+ }
+ /* Wait for the transmitter to go idle */
+ while (started && ao_radio_int_pin() != 0 && !ao_radio_abort) {
+ ao_radio_wake = 0;
+ ao_radio_enable_isr();
+ ao_radio_wait_isr(0);
}
- sei();
- if (marc_status != CC1120_MARC_STATUS1_RX_FINISHED)
- ao_radio_fifo_read(d, size);
+ if (ao_radio_abort)
+ ao_radio_idle();
ao_radio_put();
- return marc_status == CC1120_MARC_STATUS1_RX_FINISHED;
}
-/*
- * Packet deviation is 20.5kHz
- *
- * fdev = fosc >> 24 * (256 + dev_m) << dev_e
- *
- * 32e6Hz / (2 ** 24) * (256 + 80) * (2 ** 5) = 20508Hz
- */
+static uint8_t rx_data[(AO_RADIO_MAX_RECV + 4) * 2 * 8];
+static uint16_t rx_data_count;
+static uint16_t rx_data_consumed;
+static uint16_t rx_data_cur;
+static uint8_t rx_ignore;
+static uint8_t rx_waiting;
+static uint8_t rx_starting;
+static uint8_t rx_task_id;
+static uint32_t rx_fast_start;
+static uint32_t rx_slow_start;
+static uint32_t rx_missed;
-#define PACKET_DEV_E 5
-#define PACKET_DEV_M 80
+#if AO_PROFILE
+static uint32_t rx_start_tick, rx_packet_tick, rx_done_tick, rx_last_done_tick;
-/*
- * For our packet data, set the symbol rate to 38360 Baud
- *
- * (2**20 - DATARATE_M) * 2 ** DATARATE_E
- * Rdata = -------------------------------------- * fosc
- * 2 ** 39
- *
- * DATARATE_M = 405002
- * DATARATE_E = 10
- *
- * To make the tone last for 200ms, we need 2000 * .2 = 400 bits or 50 bytes
- */
-#define PACKET_DRATE_E 10
-#define PACKET_DRATE_M 405002
+uint32_t ao_rx_start_tick, ao_rx_packet_tick, ao_rx_done_tick, ao_rx_last_done_tick;
-static const uint16_t packet_setup[] = {
- CC1120_DEVIATION_M, PACKET_DEV_M,
- CC1120_MODCFG_DEV_E, ((CC1120_MODCFG_DEV_E_MODEM_MODE_NORMAL << CC1120_MODCFG_DEV_E_MODEM_MODE) |
- (CC1120_MODCFG_DEV_E_MOD_FORMAT_2_GFSK << CC1120_MODCFG_DEV_E_MOD_FORMAT) |
- (PACKET_DEV_E << CC1120_MODCFG_DEV_E_DEV_E)),
- CC1120_DRATE2, ((PACKET_DRATE_E << CC1120_DRATE2_DATARATE_E) |
- (((PACKET_DRATE_M >> 16) & CC1120_DRATE2_DATARATE_M_19_16_MASK) << CC1120_DRATE2_DATARATE_M_19_16)),
- CC1120_DRATE1, ((PACKET_DRATE_M >> 8) & 0xff),
- CC1120_DRATE0, ((PACKET_DRATE_M >> 0) & 0xff),
- CC1120_PKT_CFG2, ((CC1120_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1120_PKT_CFG2_CCA_MODE) |
- (CC1120_PKT_CFG2_PKT_FORMAT_NORMAL << CC1120_PKT_CFG2_PKT_FORMAT)),
- CC1120_PKT_CFG1, ((1 << CC1120_PKT_CFG1_WHITE_DATA) |
- (CC1120_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1120_PKT_CFG1_ADDR_CHECK_CFG) |
- (CC1120_PKT_CFG1_CRC_CFG_DISABLED << CC1120_PKT_CFG1_CRC_CFG) |
- (1 << CC1120_PKT_CFG1_APPEND_STATUS)),
-};
+#include <ao_profile.h>
+#endif
-void
-ao_radio_set_packet(void)
+static void
+ao_radio_rx_isr(void)
{
- int i;
+ uint8_t d;
- for (i = 0; i < sizeof (rdf_setup) / sizeof (rdf_setup[0]); i += 2)
- ao_radio_reg_write(packet_setup[i], packet_setup[i+1]);
+ if (ao_radio_abort)
+ return;
+ if (rx_task_id) {
+ if (ao_radio_try_select(rx_task_id)) {
+ ++rx_fast_start;
+ rx_task_id = 0;
+ _ao_radio_burst_read_start(CC1120_SOFT_RX_DATA_OUT);
+ } else {
+ if (rx_ignore)
+ --rx_ignore;
+ else {
+ ao_radio_abort = 1;
+ rx_missed++;
+ }
+ return;
+ }
+ }
+ if (rx_starting) {
+ rx_starting = 0;
+ ao_wakeup(&ao_radio_wake);
+ }
+ d = ao_radio_spi_recv_byte();
+ if (rx_ignore == 0) {
+ if (rx_data_cur < rx_data_count)
+ rx_data[rx_data_cur++] = d;
+ if (rx_data_cur >= rx_data_count) {
+ ao_spi_clr_cs(AO_CC1120_SPI_CS_PORT,(1 << AO_CC1120_SPI_CS_PIN));
+ ao_exti_disable(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
+ }
+ if (rx_waiting && rx_data_cur - rx_data_consumed >= AO_FEC_DECODE_BLOCK) {
+#if AO_PROFILE
+ if (!rx_packet_tick)
+ rx_packet_tick = ao_profile_tick();
+ if (rx_data_cur < rx_data_count)
+ return;
+#endif
+ rx_waiting = 0;
+ ao_wakeup(&ao_radio_wake);
+ }
+ } else {
+ --rx_ignore;
+ }
}
-void
-ao_radio_idle(void)
+static uint16_t
+ao_radio_rx_wait(void)
{
- for (;;) {
- uint8_t state = ao_radio_strobe(CC1120_SIDLE);
- if ((state >> CC1120_STATUS_STATE) == CC1120_STATUS_STATE_IDLE)
- break;
+ ao_arch_block_interrupts();
+ rx_waiting = 1;
+ while (rx_data_cur - rx_data_consumed < AO_FEC_DECODE_BLOCK &&
+ !ao_radio_abort &&
+ !ao_radio_mcu_wake)
+ {
+ if (ao_sleep_for(&ao_radio_wake, AO_MS_TO_TICKS(100)))
+ ao_radio_abort = 1;
}
- ao_radio_strobe(CC1120_SFTX);
- ao_radio_strobe(CC1120_SFRX);
+ rx_waiting = 0;
+ ao_arch_release_interrupts();
+ if (ao_radio_abort || ao_radio_mcu_wake)
+ return 0;
+ rx_data_consumed += AO_FEC_DECODE_BLOCK;
+#if AO_PROFILE
+ return rx_data_cur - rx_data_consumed;
+#endif
+ return AO_FEC_DECODE_BLOCK;
}
-static const uint16_t radio_setup[] = {
-#include "ao_cc1120_CC1120.h"
-};
+uint8_t
+ao_radio_recv(__xdata void *d, uint8_t size, uint8_t timeout)
+{
+ uint8_t len;
+ uint8_t radio_rssi = 0;
+ uint8_t rssi0;
+ uint8_t ret;
+
+ size -= 2; /* status bytes */
+ if (size > AO_RADIO_MAX_RECV) {
+ ao_delay(AO_SEC_TO_TICKS(1));
+ return 0;
+ }
+#if AO_PROFILE
+ rx_start_tick = ao_profile_tick();
+ rx_packet_tick = 0;
+#endif
+ len = size + 2; /* CRC bytes */
+ len += 1 + ~(len & 1); /* 1 or two pad bytes */
+ len *= 2; /* 1/2 rate convolution */
+ rx_data_count = len * 8; /* bytes to bits */
+ rx_data_cur = 0;
+ rx_data_consumed = 0;
+ rx_ignore = 1;
+
+ /* Must be set before changing the frequency; any abort
+ * after the frequency is set needs to terminate the read
+ * so that the registers can be reprogrammed
+ */
+ ao_radio_abort = 0;
-static uint8_t ao_radio_configured = 0;
+ ao_radio_get(len);
-static void
-ao_radio_isr(void)
-{
- ao_exti_disable(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
- ao_radio_wake = 1;
- ao_wakeup(&ao_radio_wake);
-}
+ ao_radio_wake = 0;
+ ao_radio_mcu_wake = 0;
-static void
-ao_radio_setup(void)
-{
- int i;
+ ao_radio_set_mode(AO_RADIO_MODE_PACKET_RX);
- ao_radio_strobe(CC1120_SRES);
+ /* configure interrupt pin */
+ ao_radio_reg_write(AO_CC1120_INT_GPIO_IOCFG, CC1120_IOCFG_GPIO_CFG_CLKEN_SOFT);
+ ao_exti_set_mode(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN,
+ AO_EXTI_MODE_FALLING|AO_EXTI_PRIORITY_HIGH);
- for (i = 0; i < sizeof (radio_setup) / sizeof (radio_setup[0]); i += 2)
- ao_radio_reg_write(radio_setup[i], radio_setup[i+1]);
+ rx_starting = 1;
+ rx_task_id = ao_cur_task->task_id;
- /* Enable marc status interrupt on gpio 2 pin */
- ao_radio_reg_write(CC1120_IOCFG2, CC1120_IOCFG_GPIO_CFG_MARC_MCU_WAKEUP);
+ ao_exti_set_callback(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN, ao_radio_rx_isr);
+ ao_exti_enable(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN);
- /* Enable the EXTI interrupt for the appropriate pin */
- ao_enable_port(AO_CC1120_INT_PORT);
- ao_exti_setup(&AO_CC1120_INT_PORT, AO_CC1120_INT_PIN, AO_EXTI_MODE_FALLING, ao_radio_isr);
+ ao_radio_strobe(CC1120_SRX);
- ao_radio_set_packet();
- ao_radio_configured = 1;
-}
+ ao_arch_block_interrupts();
+ while (rx_starting && !ao_radio_abort) {
+ if (ao_sleep_for(&ao_radio_wake, timeout))
+ ao_radio_abort = 1;
+ }
+ uint8_t rx_task_id_save = rx_task_id;
+ rx_task_id = 0;
+ rx_starting = 0;
+ ao_arch_release_interrupts();
+
+ if (ao_radio_abort) {
+ if (rx_task_id_save == 0)
+ ao_radio_burst_read_stop();
+ ret = 0;
+ goto abort;
+ }
-void
-ao_radio_get(uint8_t len)
-{
- ao_mutex_get(&ao_radio_mutex);
- if (!ao_radio_configured)
- ao_radio_setup();
- ao_radio_reg_write(CC1120_FREQ2, ao_config.radio_setting >> 16);
- ao_radio_reg_write(CC1120_FREQ1, ao_config.radio_setting >> 8);
- ao_radio_reg_write(CC1120_FREQ0, ao_config.radio_setting);
- ao_radio_reg_write(CC1120_PKT_LEN, len);
+ if (rx_task_id_save) {
+ ++rx_slow_start;
+ ao_radio_select();
+ _ao_radio_burst_read_start(CC1120_SOFT_RX_DATA_OUT);
+ if (rx_ignore) {
+ (void) ao_radio_spi_recv_byte();
+ --rx_ignore;
+ }
+ }
+
+ ret = ao_fec_decode(rx_data, rx_data_count, d, size + 2, ao_radio_rx_wait);
+
+ ao_radio_burst_read_stop();
+
+ if (ao_radio_mcu_wake)
+ ao_radio_check_marc_status();
+ if (ao_radio_abort)
+ ret = 0;
+
+abort:
+ /* Convert from 'real' rssi to cc1111-style values */
+
+ rssi0 = ao_radio_reg_read(CC1120_RSSI0);
+ if (rssi0 & 1) {
+ int8_t rssi = ao_radio_reg_read(CC1120_RSSI1);
+ ao_radio_rssi = rssi;
+
+ /* Bound it to the representable range */
+ if (rssi > -11)
+ rssi = -11;
+ radio_rssi = AO_RADIO_FROM_RSSI (rssi);
+ }
+
+ ao_radio_idle();
+
+ ao_radio_put();
+
+ /* Store the received RSSI value; the crc-OK byte is already done */
+
+ ((uint8_t *) d)[size] = radio_rssi;
+
+#if AO_PROFILE
+ rx_last_done_tick = rx_done_tick;
+ rx_done_tick = ao_profile_tick();
+
+ ao_rx_start_tick = rx_start_tick;
+ ao_rx_packet_tick = rx_packet_tick;
+ ao_rx_done_tick = rx_done_tick;
+ ao_rx_last_done_tick = rx_last_done_tick;
+#endif
+
+ return ret;
}
+
#if CC1120_DEBUG
static char *cc1120_state_name[] = {
[CC1120_STATUS_STATE_IDLE] = "IDLE",
char *name;
};
-const static struct ao_cc1120_reg ao_cc1120_reg[] = {
+static const struct ao_cc1120_reg ao_cc1120_reg[] = {
{ .addr = CC1120_IOCFG3, .name = "IOCFG3" },
{ .addr = CC1120_IOCFG2, .name = "IOCFG2" },
{ .addr = CC1120_IOCFG1, .name = "IOCFG1" },
static void ao_radio_show(void) {
uint8_t status = ao_radio_status();
- int i;
+ unsigned int i;
ao_radio_get(0xff);
status = ao_radio_status();
printf ("Status: %02x\n", status);
printf ("CHIP_RDY: %d\n", (status >> CC1120_STATUS_CHIP_RDY) & 1);
printf ("STATE: %s\n", cc1120_state_name[(status >> CC1120_STATUS_STATE) & CC1120_STATUS_STATE_MASK]);
- printf ("MARC: %02x\n", ao_radio_marc_status());
+ printf ("MARC: %02x\n", ao_radio_get_marc_status());
for (i = 0; i < AO_NUM_CC1120_REG; i++)
printf ("\t%02x %-20.20s\n", ao_radio_reg_read(ao_cc1120_reg[i].addr), ao_cc1120_reg[i].name);
+
+ printf("RX fast start: %u\n", rx_fast_start);
+ printf("RX slow start: %u\n", rx_slow_start);
+ printf("RX missed: %u\n", rx_missed);
ao_radio_put();
}
static void ao_radio_beep(void) {
- ao_radio_rdf(120);
+ ao_radio_rdf();
}
+static void ao_radio_packet(void) {
+ static const uint8_t packet[] = {
+#if 1
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+#else
+ 3, 1, 2, 3
+#endif
+ };
+
+ ao_radio_send(packet, sizeof (packet));
+}
+
+void
+ao_radio_test_recv(void)
+{
+ uint8_t bytes[34];
+ uint8_t b;
+
+ if (ao_radio_recv(bytes, 34, 0)) {
+ if (bytes[33] & 0x80)
+ printf ("CRC OK");
+ else
+ printf ("CRC BAD");
+ printf (" RSSI %d", AO_RSSI_FROM_RADIO(bytes[32]));
+ for (b = 0; b < 32; b++)
+ printf (" %02x", bytes[b]);
+ printf ("\n");
+ }
+}
+
+#if HAS_APRS
+#include <ao_aprs.h>
+
+static void
+ao_radio_aprs(void)
+{
+#if PACKET_HAS_SLAVE
+ ao_packet_slave_stop();
+#endif
+ ao_aprs_send();
+}
+#endif
#endif
static const struct ao_cmds ao_radio_cmds[] = {
- { ao_radio_test, "C <1 start, 0 stop, none both>\0Radio carrier test" },
+ { ao_radio_test_cmd, "C <1 start, 0 stop, none both>\0Radio carrier test" },
#if CC1120_DEBUG
+#if HAS_APRS
+ { ao_radio_aprs, "G\0Send APRS packet" },
+#endif
{ ao_radio_show, "R\0Show CC1120 status" },
{ ao_radio_beep, "b\0Emit an RDF beacon" },
+ { ao_radio_packet, "p\0Send a test packet" },
+ { ao_radio_test_recv, "q\0Recv a test packet" },
#endif
{ 0, NULL }
};
void
ao_radio_init(void)
{
- int i;
-
ao_radio_configured = 0;
ao_spi_init_cs (AO_CC1120_SPI_CS_PORT, (1 << AO_CC1120_SPI_CS_PIN));
- AO_CC1120_SPI_CS_PORT.bsrr = ((uint32_t) (1 << AO_CC1120_SPI_CS_PIN));
+#if 0
+ AO_CC1120_SPI_CS_PORT->bsrr = ((uint32_t) (1 << AO_CC1120_SPI_CS_PIN));
for (i = 0; i < 10000; i++) {
- if ((SPI_2_GPIO.idr & (1 << SPI_2_MISO)) == 0)
+ if ((SPI_2_PORT->idr & (1 << SPI_2_MISO_PIN)) == 0)
break;
}
- AO_CC1120_SPI_CS_PORT.bsrr = (1 << AO_CC1120_SPI_CS_PIN);
+ AO_CC1120_SPI_CS_PORT->bsrr = (1 << AO_CC1120_SPI_CS_PIN);
if (i == 10000)
- ao_panic(AO_PANIC_SELF_TEST);
+ ao_panic(AO_PANIC_SELF_TEST_CC1120);
+#endif
+
+ /* Enable the EXTI interrupt for the appropriate pin */
+ ao_enable_port(AO_CC1120_INT_PORT);
+ ao_exti_setup(AO_CC1120_INT_PORT, AO_CC1120_INT_PIN,
+ AO_EXTI_MODE_FALLING|AO_EXTI_PRIORITY_HIGH,
+ ao_radio_isr);
+
+ /* Enable the hacked up GPIO3 pin */
+ ao_enable_port(AO_CC1120_MCU_WAKEUP_PORT);
+ ao_exti_setup(AO_CC1120_MCU_WAKEUP_PORT, AO_CC1120_MCU_WAKEUP_PIN,
+ AO_EXTI_MODE_FALLING|AO_EXTI_PRIORITY_MED,
+ ao_radio_mcu_wakeup_isr);
+
ao_cmd_register(&ao_radio_cmds[0]);
}