void
ao_spi_send_bus(void __xdata *block, uint16_t len) __reentrant
{
+#if !AO_SPI_SLAVE
ao_dma_set_transfer(ao_spi_dma_in_id,
&U0DBUFXADDR,
&ao_spi_const,
DMA_CFG1_SRCINC_0 |
DMA_CFG1_DESTINC_0 |
DMA_CFG1_PRIORITY_NORMAL);
-
+#endif
ao_dma_set_transfer(ao_spi_dma_out_id,
block,
&U0DBUFXADDR,
DMA_CFG1_DESTINC_0 |
DMA_CFG1_PRIORITY_NORMAL);
+#if !AO_SPI_SLAVE
ao_dma_start(ao_spi_dma_in_id);
+#endif
ao_dma_start(ao_spi_dma_out_id);
ao_dma_trigger(ao_spi_dma_out_id);
+#if AO_SPI_SLAVE
+ __critical while (!ao_spi_dma_out_done)
+ ao_sleep(&ao_spi_dma_out_done);
+#else
__critical while (!ao_spi_dma_in_done)
ao_sleep(&ao_spi_dma_in_done);
+#endif
}
/* Receive bytes over SPI.
* MO P1_5
* MI P1_4
* CLK P1_3
+ * CSS P1_2
*
- * Chip select is the responsibility of the caller
+ * Chip select is the responsibility of the caller in master mode
*/
+#if AO_SPI_SLAVE
+#define CSS (1 << 2)
+#define UxCSR_DIRECTION UxCSR_SLAVE
+#else
+#define CSS 0
+#define UxCSR_DIRECTION UxCSR_MASTER
+#endif
+
void
ao_spi_init(void)
{
P2SEL = (P2SEL & ~P2SEL_PRI3P1_MASK) | P2SEL_PRI3P1_USART0;
/* Make the SPI pins be controlled by the USART peripheral */
- P1SEL |= ((1 << 5) | (1 << 4) | (1 << 3));
+ P1SEL |= ((1 << 5) | (1 << 4) | (1 << 3) | CSS);
/* Set up OUT DMA */
ao_spi_dma_out_id = ao_dma_alloc(&ao_spi_dma_out_done);
*
* SPI master mode
*/
- U0CSR = (UxCSR_MODE_SPI | UxCSR_RE | UxCSR_MASTER);
+ U0CSR = (UxCSR_MODE_SPI | UxCSR_RE | UxCSR_DIRECTION);
/* Set the baud rate and signal parameters
*