ao_delay(AO_SEC_TO_TICKS(2)); \
} while (0)
-#define ao_arch_nop() _asm nop _endasm
+#define ao_arch_nop() __asm nop __endasm
#define ao_arch_interrupt(n) __interrupt n
#define ao_arch_naked_declare __naked
#define AO_ROMCONFIG_VERSION 2
-extern __code __at (0x00a0) uint16_t ao_romconfig_version;
-extern __code __at (0x00a2) uint16_t ao_romconfig_check;
-extern __code __at (0x00a4) uint16_t ao_serial_number;
-extern __code __at (0x00a6) uint32_t ao_radio_cal;
+#define AO_ROMCONFIG_SYMBOL(a) __code __at(a)
+
+extern AO_ROMCONFIG_SYMBOL(0x00a0) uint16_t ao_romconfig_version;
+extern AO_ROMCONFIG_SYMBOL(0x00a2) uint16_t ao_romconfig_check;
+extern AO_ROMCONFIG_SYMBOL(0x00a4) uint16_t ao_serial_number;
+extern AO_ROMCONFIG_SYMBOL(0x00a6) uint32_t ao_radio_cal;
#ifndef HAS_USB
#error Please define HAS_USB
/* Save current context */
#define ao_arch_save_regs() \
- _asm \
+ __asm \
/* Push ACC first, as when restoring the context it must be restored \
* last (it is used to set the IE register). */ \
push ACC \
- /* Store the IE register then enable interrupts. */ \
push _IEN0 \
- setb _EA \
push DPL \
push DPH \
push b \
push ar0 \
push ar1 \
push PSW \
- _endasm; \
+ __endasm; \
PSW = 0; \
- _asm \
+ __asm \
push _bp \
- _endasm
+ __endasm
#define ao_arch_save_stack() { \
uint8_t stack_len; \
while (--stack_len); \
}
-#define ao_arch_isr_stack() \
- /* Empty the stack; might as well let interrupts have the whole thing */ \
- (SP = AO_STACK_START - 1)
+/* Empty the stack; might as well let interrupts have the whole thing */
+#define ao_arch_isr_stack() (SP = AO_STACK_START - 1)
+
+#define ao_arch_block_interrupts() __asm clr _EA __endasm
+#define ao_arch_release_interrupts() __asm setb _EA __endasm
-#define ao_arch_cpu_idle() (PCON = PCON_IDLE)
+/* Idle the CPU, waking when an interrupt occurs */
+#define ao_arch_wait_interrupt() do { \
+ ao_arch_release_interrupts(); \
+ (PCON = PCON_IDLE); \
+ ao_arch_block_interrupts(); \
+ } while (0)
#define ao_arch_restore_stack() { \
uint8_t stack_len; \
*stack_ptr++ = *save_ptr++; \
while (--stack_len); \
\
- _asm \
+ __asm \
pop _bp \
pop PSW \
pop ar1 \
0098$: \
SETB _EA \
0099$: \
- /* Finally pop off the ACC, which was the first register saved. */ \
+ /* Finally restore ACC, which was the first register saved. */ \
pop ACC \
ret \
- _endasm; \
+ __endasm; \
}
#define ao_arch_critical(b) __critical { b }
-struct ao_adc {
- uint16_t tick; /* tick when the sample was read */
- int16_t accel; /* accelerometer */
- int16_t pres; /* pressure sensor */
- int16_t temp; /* temperature sensor */
- int16_t v_batt; /* battery voltage */
- int16_t sense_d; /* drogue continuity sense */
- int16_t sense_m; /* main continuity sense */
-};
-
-#define AO_ADC_RING 32
+#define AO_DATA_RING 32
/* ao_button.c */
#ifdef HAS_BUTTON
/* ao_string.c */
void
-_ao_xmemcpy(__xdata void *dst, __xdata void *src, uint8_t count);
+_ao_xmemcpy(__xdata void *dst, __xdata void *src, uint16_t count);
#define ao_xmemcpy(d,s,c) _ao_xmemcpy(d,s,c)
void
-_ao_xmemset(__xdata void *dst, uint8_t value, uint8_t count);
+_ao_xmemset(__xdata void *dst, uint8_t value, uint16_t count);
#define ao_xmemset(d,v,c) _ao_xmemset(d,v,c)
int8_t
-_ao_xmemcmp(__xdata void *a, __xdata void *b, uint8_t count);
+_ao_xmemcmp(__xdata void *a, __xdata void *b, uint16_t count);
#define ao_xmemcmp(d,s,c) _ao_xmemcmp((d), (s), (c))
+struct ao_serial_speed {
+ uint8_t baud;
+ uint8_t gcr;
+};
+
+extern const __code struct ao_serial_speed ao_serial_speeds[];
+
+/*
+ * ao_dma.c
+ */
+
+/* Allocate a DMA channel. the 'done' parameter will be set when the
+ * dma is finished and will be used to wakeup any waiters
+ */
+
+uint8_t
+ao_dma_alloc(__xdata uint8_t * done);
+
+/* Setup a DMA channel */
+void
+ao_dma_set_transfer(uint8_t id,
+ void __xdata *srcaddr,
+ void __xdata *dstaddr,
+ uint16_t count,
+ uint8_t cfg0,
+ uint8_t cfg1);
+
+/* Start a DMA channel */
+void
+ao_dma_start(uint8_t id);
+
+/* Manually trigger a DMA channel */
+void
+ao_dma_trigger(uint8_t id);
+
+/* Abort a running DMA transfer */
+void
+ao_dma_abort(uint8_t id);
+
+/* DMA interrupt routine */
+void
+ao_dma_isr(void) ao_arch_interrupt(8);
+
+/* ao_adc.c */
+
+#if HAS_ADC
+/* The A/D interrupt handler */
+void
+ao_adc_isr(void) ao_arch_interrupt(1);
+#endif
+
+#if HAS_USB
+/* USB interrupt handler */
+void
+ao_usb_isr(void) ao_arch_interrupt(6);
+#endif
+
+#if HAS_SERIAL_0
+void
+ao_serial0_rx_isr(void) ao_arch_interrupt(2);
+
+void
+ao_serial0_tx_isr(void) ao_arch_interrupt(7);
+#endif
+
+#if HAS_SERIAL_1
+void
+ao_serial1_rx_isr(void) ao_arch_interrupt(3);
+
+void
+ao_serial1_tx_isr(void) ao_arch_interrupt(14);
+#endif
+
+#if HAS_EXTI_0
+void
+ao_p0_isr(void) __interrupt(13);
+#endif
+
#endif /* _AO_ARCH_H_ */