#define EE_DEVICE_SIZE ((uint32_t) 128 * (uint32_t) 1024)
/* Total bytes of available storage */
-__xdata uint32_t ao_storage_total;
+__pdata uint32_t ao_storage_total;
/* Block size - device is erased in these units. At least 256 bytes */
-__xdata uint32_t ao_storage_block;
+__pdata uint32_t ao_storage_block;
/* Byte offset of config block. Will be ao_storage_block bytes long */
-__xdata uint32_t ao_storage_config;
+__pdata uint32_t ao_storage_config;
/* Storage unit size - device reads and writes must be within blocks of this size. Usually 256 bytes. */
-__xdata uint16_t ao_storage_unit;
+__pdata uint16_t ao_storage_unit;
/*
* Using SPI on USART 0, with P1_2 as the chip select
_asm nop _endasm; \
} while(0)
-static void ao_ee_cs_low(void)
-{
- ao_ee_delay();
- EE_CS = 0;
- ao_ee_delay();
-}
+#define ao_ee_cs_low() ao_spi_get_bit(EE_CS)
-static void ao_ee_cs_high(void)
-{
- ao_ee_delay();
- EE_CS = 1;
- ao_ee_delay();
-}
+#define ao_ee_cs_high() ao_spi_put_bit(EE_CS)
struct ao_ee_instruction {
uint8_t instruction;