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target/cortex_m: minor refactoring in cortex_m_store_core_reg_u32()
[fw/openocd]
/
src
/
target
/
cortex_m.c
diff --git
a/src/target/cortex_m.c
b/src/target/cortex_m.c
index 649ee32f22572a23150a244f46c9f9c014b56686..7125e9e8309f41873a81dbe8b2a05fecbfa6a56e 100644
(file)
--- a/
src/target/cortex_m.c
+++ b/
src/target/cortex_m.c
@@
-397,11
+397,9
@@
static int cortex_m_store_core_reg_u32(struct target *target,
/* check if value is written into register */
then = timeval_ms();
while (1) {
/* check if value is written into register */
then = timeval_ms();
while (1) {
- retval = mem_ap_read_atomic_u32(armv7m->debug_ap, DCB_DHCSR,
- &cortex_m->dcb_dhcsr);
+ retval = cortex_m_read_dhcsr_atomic_sticky(target);
if (retval != ERROR_OK)
return retval;
if (retval != ERROR_OK)
return retval;
- cortex_m_cumulate_dhcsr_sticky(cortex_m, cortex_m->dcb_dhcsr);
if (cortex_m->dcb_dhcsr & S_REGRDY)
break;
if (timeval_ms() > then + DHCSR_S_REGRDY_TIMEOUT) {
if (cortex_m->dcb_dhcsr & S_REGRDY)
break;
if (timeval_ms() > then + DHCSR_S_REGRDY_TIMEOUT) {
@@
-2292,7
+2290,6
@@
int cortex_m_examine(struct target *target)
armv7m->debug_ap = dap_ap(swjdp, cortex_m->apsel);
}
armv7m->debug_ap = dap_ap(swjdp, cortex_m->apsel);
}
- /* Leave (only) generic DAP stuff for debugport_init(); */
armv7m->debug_ap->memaccess_tck = 8;
retval = mem_ap_init(armv7m->debug_ap);
armv7m->debug_ap->memaccess_tck = 8;
retval = mem_ap_init(armv7m->debug_ap);