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Merge branch 'master'
[fw/altos]
/
src
/
stm32l0
/
ao_adc_stm32l0.c
diff --git
a/src/stm32l0/ao_adc_stm32l0.c
b/src/stm32l0/ao_adc_stm32l0.c
index a7af0a08308197fc21a6a395eaf59284e9b4a031..5c0f4c2bd1021e2e25597148710355f5bf93e61c 100644
(file)
--- a/
src/stm32l0/ao_adc_stm32l0.c
+++ b/
src/stm32l0/ao_adc_stm32l0.c
@@
-54,8
+54,8
@@
ao_adc_init(void)
(0 << STM_ADC_CCR_VREFEN));
/* Calibrate. This also enables the ADC vreg */
(0 << STM_ADC_CCR_VREFEN));
/* Calibrate. This also enables the ADC vreg */
- stm_adc.cr |= (1 << STM_ADC_CR_ADCAL);
- while ((stm_adc.cr & (1 << STM_ADC_CR_ADCAL)) != 0)
+ stm_adc.cr |= (1
UL
<< STM_ADC_CR_ADCAL);
+ while ((stm_adc.cr & (1
UL
<< STM_ADC_CR_ADCAL)) != 0)
;
/* Enable */
;
/* Enable */
@@
-77,10
+77,10
@@
ao_adc_shutdown(void)
stm_adc.isr = (1 << STM_ADC_ISR_ADRDY);
/* Disable ADC vreg */
stm_adc.isr = (1 << STM_ADC_ISR_ADRDY);
/* Disable ADC vreg */
- stm_adc.cr &= ~(1 << STM_ADC_CR_ADVREGEN);
+ stm_adc.cr &= ~(1
UL
<< STM_ADC_CR_ADVREGEN);
/* Disable ADC clocks */
/* Disable ADC clocks */
- stm_rcc.apb2enr &= ~(1 << STM_RCC_APB2ENR_ADCEN);
+ stm_rcc.apb2enr &= ~(1
UL
<< STM_RCC_APB2ENR_ADCEN);
}
uint16_t
}
uint16_t
@@
-104,7
+104,7
@@
ao_adc_read_vref(void)
;
/* Fetch result */
;
/* Fetch result */
- value = stm_adc.dr;
+ value =
(uint16_t)
stm_adc.dr;
ao_adc_shutdown();
return value;
ao_adc_shutdown();
return value;