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altos/stm32f103: Fix continuous ADC code
[fw/altos]
/
src
/
stm32f1
/
ao_adc_stm.c
diff --git
a/src/stm32f1/ao_adc_stm.c
b/src/stm32f1/ao_adc_stm.c
index 9523bd65e08bd245fa3d485690561be6f0ddc533..36021443e6989194903d9fb2ef7d8e5d53edea35 100644
(file)
--- a/
src/stm32f1/ao_adc_stm.c
+++ b/
src/stm32f1/ao_adc_stm.c
@@
-21,12
+21,12
@@
static uint8_t ao_adc_ready;
static uint8_t ao_adc_ready;
-#define AO_ADC_CR2_VAL
((HAS_ADC_TEMP << STM_ADC_CR2_TSVREFE) |\
- (
0 << STM_ADC_CR2_SWSTART) |
\
+#define AO_ADC_CR2_VAL
(start)
((HAS_ADC_TEMP << STM_ADC_CR2_TSVREFE) |\
+ (
(start) << STM_ADC_CR2_SWSTART) |
\
(0 << STM_ADC_CR2_JWSTART) | \
(0 << STM_ADC_CR2_EXTTRIG) | \
(0 << STM_ADC_CR2_JWSTART) | \
(0 << STM_ADC_CR2_EXTTRIG) | \
- (
0 << STM_ADC_CR2_EXTSEL) |
\
- (0 << STM_ADC_CR2_JEXTTRIG) | \
+ (
STM_ADC_CR2_EXTSEL_SWSTART << STM_ADC_CR2_EXTSEL) |
\
+ (0 << STM_ADC_CR2_JEXTTRIG) |
\
(0 << STM_ADC_CR2_JEXTSEL) | \
(0 << STM_ADC_CR2_ALIGN) | \
(1 << STM_ADC_CR2_DMA) | \
(0 << STM_ADC_CR2_JEXTSEL) | \
(0 << STM_ADC_CR2_ALIGN) | \
(1 << STM_ADC_CR2_DMA) | \
@@
-72,7
+72,9
@@
ao_adc_poll(void)
ao_dma_set_isr(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1), ao_adc_done);
ao_dma_start(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1));
ao_dma_set_isr(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1), ao_adc_done);
ao_dma_start(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1));
- stm_adc1.cr2 = AO_ADC_CR2_VAL | (1 << STM_ADC_CR2_SWSTART);
+ stm_adc1.cr2 = AO_ADC_CR2_VAL(0);
+ stm_adc1.cr2 = AO_ADC_CR2_VAL(0);
+ stm_adc1.cr2 = AO_ADC_CR2_VAL(1);
}
#ifdef AO_ADC_SQ1_NAME
}
#ifdef AO_ADC_SQ1_NAME