projects
/
fw
/
altos
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
altos/telelco-v3.0: Don't connect PA6 to SPI
[fw/altos]
/
src
/
stm32f1
/
ao_adc_single_stm.c
diff --git
a/src/stm32f1/ao_adc_single_stm.c
b/src/stm32f1/ao_adc_single_stm.c
index 3ddddf1093faff45fc8bd32f01516367b9cb2e9e..01a3fa6a75c307892960c9b78a6f773b183610c0 100644
(file)
--- a/
src/stm32f1/ao_adc_single_stm.c
+++ b/
src/stm32f1/ao_adc_single_stm.c
@@
-22,12
+22,12
@@
static uint8_t ao_adc_ready;
static uint8_t ao_adc_ready;
-#define AO_ADC_CR2_VAL
((HAS_ADC_TEMP << STM_ADC_CR2_TSVREF) | \
- (
0 << STM_ADC_CR2_SWSTART) |
\
+#define AO_ADC_CR2_VAL
(start)
((HAS_ADC_TEMP << STM_ADC_CR2_TSVREF) | \
+ (
(start) << STM_ADC_CR2_SWSTART) |
\
(0 << STM_ADC_CR2_JWSTART) | \
(0 << STM_ADC_CR2_EXTTRIG) | \
(0 << STM_ADC_CR2_JWSTART) | \
(0 << STM_ADC_CR2_EXTTRIG) | \
- (
0 << STM_ADC_CR2_EXTSEL) |
\
- (0 << STM_ADC_CR2_JEXTTRIG) | \
+ (
STM_ADC_CR2_EXTSEL_SWSTART << STM_ADC_CR2_EXTSEL) |
\
+ (0 << STM_ADC_CR2_JEXTTRIG) |
\
(0 << STM_ADC_CR2_JEXTSEL) | \
(0 << STM_ADC_CR2_ALIGN) | \
(1 << STM_ADC_CR2_DMA) | \
(0 << STM_ADC_CR2_JEXTSEL) | \
(0 << STM_ADC_CR2_ALIGN) | \
(1 << STM_ADC_CR2_DMA) | \
@@
-44,6
+44,8
@@
static void ao_adc_done(int index)
(void) index;
ao_dma_done_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1));
ao_adc_ready = 1;
(void) index;
ao_dma_done_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1));
ao_adc_ready = 1;
+ /* Turn the ADC back off */
+ stm_adc1.cr2 = 0;
ao_wakeup((void *) &ao_adc_ready);
}
ao_wakeup((void *) &ao_adc_ready);
}
@@
-54,9
+56,9
@@
static void
ao_adc_poll(struct ao_adc *packet)
{
ao_adc_ready = 0;
ao_adc_poll(struct ao_adc *packet)
{
ao_adc_ready = 0;
- stm_adc.sr = 0;
+ stm_adc
1
.sr = 0;
ao_dma_set_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1),
ao_dma_set_transfer(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1),
- &stm_adc.dr,
+ &stm_adc
1
.dr,
(void *) packet,
AO_NUM_ADC,
(0 << STM_DMA_CCR_MEM2MEM) |
(void *) packet,
AO_NUM_ADC,
(0 << STM_DMA_CCR_MEM2MEM) |
@@
-70,7
+72,11
@@
ao_adc_poll(struct ao_adc *packet)
ao_dma_set_isr(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1), ao_adc_done);
ao_dma_start(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1));
ao_dma_set_isr(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1), ao_adc_done);
ao_dma_start(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1));
- stm_adc.cr2 = AO_ADC_CR2_VAL | (1 << STM_ADC_CR2_SWSTART);
+ stm_adc1.cr2 = AO_ADC_CR2_VAL(0);
+ ao_delay(AO_MS_TO_TICKS(10));
+ stm_adc1.cr2 = AO_ADC_CR2_VAL(0);
+ ao_delay(AO_MS_TO_TICKS(10));
+ stm_adc1.cr2 = AO_ADC_CR2_VAL(1);
}
/*
}
/*
@@
-190,9
+196,9
@@
ao_adc_single_init(void)
stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_ADC1EN);
/* Turn off ADC during configuration */
stm_rcc.apb2enr |= (1 << STM_RCC_APB2ENR_ADC1EN);
/* Turn off ADC during configuration */
- stm_adc.cr2 = 0;
+ stm_adc
1
.cr2 = 0;
- stm_adc.cr1 = ((0 << STM_ADC_CR1_AWDEN ) |
+ stm_adc
1
.cr1 = ((0 << STM_ADC_CR1_AWDEN ) |
(0 << STM_ADC_CR1_JAWDEN ) |
(STM_ADC_CR1_DUALMOD_INDEPENDENT << STM_ADC_CR1_DUALMOD ) |
(0 << STM_ADC_CR1_DISCNUM ) |
(0 << STM_ADC_CR1_JAWDEN ) |
(STM_ADC_CR1_DUALMOD_INDEPENDENT << STM_ADC_CR1_DUALMOD ) |
(0 << STM_ADC_CR1_DISCNUM ) |
@@
-207,70
+213,66
@@
ao_adc_single_init(void)
(0 << STM_ADC_CR1_AWDCH ));
/* 384 cycle sample time for everyone */
(0 << STM_ADC_CR1_AWDCH ));
/* 384 cycle sample time for everyone */
- stm_adc.smpr1 = 0x00ffffff;
- stm_adc.smpr2 = 0x3fffffff;
+ stm_adc
1
.smpr1 = 0x00ffffff;
+ stm_adc
1
.smpr2 = 0x3fffffff;
- stm_adc.sqr1 = ((AO_NUM_ADC - 1) << 20);
+ stm_adc
1
.sqr1 = ((AO_NUM_ADC - 1) << 20);
#if AO_NUM_ADC > 0
#if AO_NUM_ADC > 0
- stm_adc.sqr3 |= (AO_ADC_SQ1 << 0);
+ stm_adc
1
.sqr3 |= (AO_ADC_SQ1 << 0);
#endif
#if AO_NUM_ADC > 1
#endif
#if AO_NUM_ADC > 1
- stm_adc.sqr3 |= (AO_ADC_SQ2 << 5);
+ stm_adc
1
.sqr3 |= (AO_ADC_SQ2 << 5);
#endif
#if AO_NUM_ADC > 2
#endif
#if AO_NUM_ADC > 2
- stm_adc.sqr3 |= (AO_ADC_SQ3 << 10);
+ stm_adc
1
.sqr3 |= (AO_ADC_SQ3 << 10);
#endif
#if AO_NUM_ADC > 3
#endif
#if AO_NUM_ADC > 3
- stm_adc.sqr3 |= (AO_ADC_SQ4 << 15);
+ stm_adc
1
.sqr3 |= (AO_ADC_SQ4 << 15);
#endif
#if AO_NUM_ADC > 4
#endif
#if AO_NUM_ADC > 4
- stm_adc.sqr3 |= (AO_ADC_SQ5 << 20);
+ stm_adc
1
.sqr3 |= (AO_ADC_SQ5 << 20);
#endif
#if AO_NUM_ADC > 5
#endif
#if AO_NUM_ADC > 5
- stm_adc.sqr3 |= (AO_ADC_SQ6 << 25);
+ stm_adc
1
.sqr3 |= (AO_ADC_SQ6 << 25);
#endif
#if AO_NUM_ADC > 6
#endif
#if AO_NUM_ADC > 6
- stm_adc.sqr2 |= (AO_ADC_SQ7 << 0);
+ stm_adc
1
.sqr2 |= (AO_ADC_SQ7 << 0);
#endif
#if AO_NUM_ADC > 7
#endif
#if AO_NUM_ADC > 7
- stm_adc.sqr2 |= (AO_ADC_SQ8 << 5);
+ stm_adc
1
.sqr2 |= (AO_ADC_SQ8 << 5);
#endif
#if AO_NUM_ADC > 8
#endif
#if AO_NUM_ADC > 8
- stm_adc.sqr2 |= (AO_ADC_SQ9 << 10);
+ stm_adc
1
.sqr2 |= (AO_ADC_SQ9 << 10);
#endif
#if AO_NUM_ADC > 9
#endif
#if AO_NUM_ADC > 9
- stm_adc.sqr2 |= (AO_ADC_SQ10 << 15);
+ stm_adc
1
.sqr2 |= (AO_ADC_SQ10 << 15);
#endif
#if AO_NUM_ADC > 10
#endif
#if AO_NUM_ADC > 10
- stm_adc.sqr2 |= (AO_ADC_SQ11 << 20);
+ stm_adc
1
.sqr2 |= (AO_ADC_SQ11 << 20);
#endif
#if AO_NUM_ADC > 11
#endif
#if AO_NUM_ADC > 11
- stm_adc.sqr2 |= (AO_ADC_SQ12 << 25);
+ stm_adc
1
.sqr2 |= (AO_ADC_SQ12 << 25);
#endif
#if AO_NUM_ADC > 12
#endif
#if AO_NUM_ADC > 12
- stm_adc.sqr1 |= (AO_ADC_SQ13 << 0);
+ stm_adc
1
.sqr1 |= (AO_ADC_SQ13 << 0);
#endif
#if AO_NUM_ADC > 13
#endif
#if AO_NUM_ADC > 13
- stm_adc.sqr1 |= (AO_ADC_SQ14 << 5);
+ stm_adc
1
.sqr1 |= (AO_ADC_SQ14 << 5);
#endif
#if AO_NUM_ADC > 14
#endif
#if AO_NUM_ADC > 14
- stm_adc.sqr1 |= (AO_ADC_SQ15 << 10);
+ stm_adc
1
.sqr1 |= (AO_ADC_SQ15 << 10);
#endif
#if AO_NUM_ADC > 15
#endif
#if AO_NUM_ADC > 15
- stm_adc.sqr1 |= (AO_ADC_SQ16 << 15);
+ stm_adc
1
.sqr1 |= (AO_ADC_SQ16 << 15);
#endif
#if AO_NUM_ADC > 15
#error "too many ADC channels"
#endif
/* Clear any stale status bits */
#endif
#if AO_NUM_ADC > 15
#error "too many ADC channels"
#endif
/* Clear any stale status bits */
- stm_adc.sr = 0;
+ stm_adc
1
.sr = 0;
ao_dma_alloc(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1));
ao_dma_alloc(STM_DMA_INDEX(STM_DMA_CHANNEL_ADC1));
- /* Turn on the ADC so that it is ready to convert */
-
- stm_adc.cr2 = AO_ADC_CR2_VAL;
-
ao_cmd_register(&ao_adc_cmds[0]);
}
ao_cmd_register(&ao_adc_cmds[0]);
}