-#define AO_SPI_5_CONFIG_PB22_PB23_PB03 (AO_SPI_CONFIG_3 | \
- AO_SPI_DOPO_MOSI_2_SCLK_3 | \
- AO_SPI_DIPO_MISO_1)
-
-#define AO_SPI_INDEX(id) ((uint8_t) ((id) & AO_SPI_INDEX_MASK))
-#define AO_SPI_CONFIG(id) ((id) & AO_SPI_CONFIG_MASK)
-#define AO_SPI_PIN_CONFIG(id) ((id) & (AO_SPI_INDEX_MASK | AO_SPI_CONFIG_MASK))
-#define AO_SPI_CPOL(id) ((uint32_t) (((id) >> AO_SPI_CPOL_BIT) & 1))
-#define AO_SPI_CPHA(id) ((uint32_t) (((id) >> AO_SPI_CPHA_BIT) & 1))
-#define AO_SPI_DOPO(id) ((uint32_t) (((id) >> AO_SPI_DOPO_BIT) & 3))
-#define AO_SPI_DIPO(id) ((uint32_t) (((id) >> AO_SPI_DIPO_BIT) & 3))
-
-/*
- * We're not going to do any fancy SPI pin remapping, just use the first
- * three PAD pins, which means:
- *
- * MOSI: PAD.0
- * SCK: PAD.1
- * MISO: PAD.2
- */
-
-#define AO_SPI_0_PA08_PA09_PA10 (0 | AO_SPI_0_CONFIG_PA08_PA09_PA10)
-#define AO_SPI_0_PA04_PA05_PA06 (0 | AO_SPI_0_CONFIG_PA04_PA05_PA06)
-
-#define AO_SPI_4_PB10_PB11_PA12 (4 | AO_SPI_4_CONFIG_PB10_PB11_PA12)
-
-#define AO_SPI_5_PB22_PB23_PB03 (5 | AO_SPI_5_CONFIG_PB22_PB23_PB03)