+#if USB_DEBUG
+static uint16_t int_count;
+static uint16_t in_count;
+static uint16_t out_count;
+static uint16_t reset_count;
+#endif
+
+void
+lpc_usb_irq_isr(void)
+{
+ uint32_t intstat = lpc_usb.intstat & lpc_usb.inten;
+
+ lpc_usb.intstat = intstat;
+ /* Handle EP0 OUT packets */
+ if (intstat & (1 << LPC_USB_INT_EPOUT(0))) {
+ if (lpc_usb.devcmdstat & (1 << LPC_USB_DEVCMDSTAT_SETUP))
+ ao_usb_ep0_receive |= AO_USB_EP0_GOT_SETUP;
+ else
+ ao_usb_ep0_receive |= AO_USB_EP0_GOT_RX_DATA;
+
+ ao_usb_ep0_handle(ao_usb_ep0_receive);
+ }
+
+ /* Handle EP0 IN packets */
+ if (intstat & (1 << LPC_USB_INT_EPIN(0))) {
+ ao_usb_ep0_receive |= AO_USB_EP0_GOT_TX_ACK;
+
+ ao_usb_ep0_handle(ao_usb_ep0_receive);
+ }
+
+
+ /* Handle OUT packets */
+ if (intstat & (1 << LPC_USB_INT_EPOUT(AO_USB_OUT_EP))) {
+#if USB_DEBUG
+ ++out_count;
+#endif
+ _rx_dbg1("RX ISR", *ao_usb_epn_out(AO_USB_OUT_EP));
+ ao_usb_out_avail = 1;
+ _rx_dbg0("out avail set");
+ ao_wakeup(AO_USB_OUT_SLEEP_ADDR)
+ _rx_dbg0("stdin awoken");
+ }
+
+ /* Handle IN packets */
+ if (intstat & (1 << LPC_USB_INT_EPIN(AO_USB_IN_EP))) {
+#if USB_DEBUG
+ ++in_count;
+#endif
+ _tx_dbg1("TX ISR", *ao_usb_epn_in(AO_USB_IN_EP));
+ ao_usb_in_pending = 0;
+ ao_wakeup(&ao_usb_in_pending);
+ }
+
+ /* NAK all INT EP IN packets */
+ if (intstat & (1 << LPC_USB_INT_EPIN(AO_USB_INT_EP))) {
+ ;
+ }
+
+ /* Check for reset */
+ if (intstat & (1 << LPC_USB_INT_DEV)) {
+ if (lpc_usb.devcmdstat & (1 << LPC_USB_DEVCMDSTAT_DRES_C))
+ {
+ lpc_usb.devcmdstat |= (1 << LPC_USB_DEVCMDSTAT_DRES_C);
+ ao_usb_ep0_receive |= AO_USB_EP0_GOT_RESET;
+ ao_usb_ep0_handle(ao_usb_ep0_receive);
+ }
+ }
+}
+
+
+