- uint32_t istr = lpc_usb.istr;
-
- if (istr & (1 << USB_USB_ISTR_CTR)) {
- uint8_t ep = istr & USB_USB_ISTR_EP_ID_MASK;
- uint32_t epr, epr_write;
-
- /* Preserve the SW write bits, don't mess with most HW writable bits,
- * clear the CTR_RX and CTR_TX bits
- */
- epr = lpc_usb.epr[ep];
- epr_write = epr;
- epr_write &= USB_USB_EPR_PRESERVE_MASK;
- epr_write |= USB_USB_EPR_INVARIANT;
- epr_write &= ~(1 << USB_USB_EPR_CTR_RX);
- epr_write &= ~(1 << USB_USB_EPR_CTR_TX);
- lpc_usb.epr[ep] = epr_write;
-
- switch (ep) {
- case 0:
- ++control_count;
- if (ao_usb_epr_ctr_rx(epr)) {
- if (ao_usb_epr_setup(epr))
- ao_usb_ep0_receive |= AO_USB_EP0_GOT_SETUP;
- else
- ao_usb_ep0_receive |= AO_USB_EP0_GOT_RX_DATA;
- }
- if (ao_usb_epr_ctr_tx(epr))
- ao_usb_ep0_receive |= AO_USB_EP0_GOT_TX_ACK;
- ao_wakeup(&ao_usb_ep0_receive);
- break;
- case AO_USB_OUT_EPR:
- ++out_count;
- if (ao_usb_epr_ctr_rx(epr)) {
- _rx_dbg1("RX ISR", epr);
- ao_usb_out_avail = 1;
- _rx_dbg0("out avail set");
- ao_wakeup(&ao_stdin_ready);
- _rx_dbg0("stdin awoken");
- }
- break;
- case AO_USB_IN_EPR:
- ++in_count;
- _tx_dbg1("TX ISR", epr);
- if (ao_usb_epr_ctr_tx(epr)) {
- ao_usb_in_pending = 0;
- ao_wakeup(&ao_usb_in_pending);
- }
- break;
- case AO_USB_INT_EPR:
- ++int_count;
- if (ao_usb_epr_ctr_tx(epr))
- _ao_usb_set_stat_tx(AO_USB_INT_EPR, USB_USB_EPR_STAT_TX_NAK);
- break;
- }
- return;
- }
-
- if (istr & (1 << USB_USB_ISTR_RESET)) {
- ++reset_count;
- lpc_usb.istr &= ~(1 << USB_USB_ISTR_RESET);
- ao_usb_ep0_receive |= AO_USB_EP0_GOT_RESET;
- ao_wakeup(&ao_usb_ep0_receive);
- }