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altos: Start work on stm32f1 support
[fw/altos]
/
src
/
lpc
/
ao_spi_lpc.c
diff --git
a/src/lpc/ao_spi_lpc.c
b/src/lpc/ao_spi_lpc.c
index a8d4cda9229b32d176c480916ff39c55988af6ed..010feb63ec3ebc5e2c4c74b165e20dc38a83ad50 100644
(file)
--- a/
src/lpc/ao_spi_lpc.c
+++ b/
src/lpc/ao_spi_lpc.c
@@
-30,7
+30,7
@@
static struct lpc_ssp * const ao_lpc_ssp[LPC_NUM_SPI] = { &lpc_ssp0, &lpc_ssp1 }
while ((lpc_ssp->sr & (1 << LPC_SSP_SR_RNE)) == 0) \
; \
/* receive a byte */ \
while ((lpc_ssp->sr & (1 << LPC_SSP_SR_RNE)) == 0) \
; \
/* receive a byte */ \
- get
lpc_ssp->dr;
\
+ get
(uint8_t) lpc_ssp->dr;
\
} \
/* Wait for the SSP to go idle (it already should be) */ \
while (lpc_ssp->sr & (1 << LPC_SSP_SR_BSY)); \
} \
/* Wait for the SSP to go idle (it already should be) */ \
while (lpc_ssp->sr & (1 << LPC_SSP_SR_BSY)); \
@@
-90,7
+90,7
@@
ao_spi_put(uint8_t id)
}
static void
}
static void
-ao_spi_channel_init(uint8_t id)
+ao_spi_channel_init(uint8_t id
, uint8_t mode
)
{
struct lpc_ssp *lpc_ssp = ao_lpc_ssp[id];
uint8_t d;
{
struct lpc_ssp *lpc_ssp = ao_lpc_ssp[id];
uint8_t d;
@@
-102,8
+102,7
@@
ao_spi_channel_init(uint8_t id)
lpc_ssp->cr0 = ((LPC_SSP_CR0_DSS_8 << LPC_SSP_CR0_DSS) |
(LPC_SSP_CR0_FRF_SPI << LPC_SSP_CR0_FRF) |
lpc_ssp->cr0 = ((LPC_SSP_CR0_DSS_8 << LPC_SSP_CR0_DSS) |
(LPC_SSP_CR0_FRF_SPI << LPC_SSP_CR0_FRF) |
- (0 << LPC_SSP_CR0_CPOL) |
- (0 << LPC_SSP_CR0_CPHA) |
+ mode |
(0 << LPC_SSP_CR0_SCR));
/* Enable the device */
(0 << LPC_SSP_CR0_SCR));
/* Enable the device */
@@
-121,6
+120,9
@@
void
ao_spi_init(void)
{
#if HAS_SPI_0
ao_spi_init(void)
{
#if HAS_SPI_0
+#ifndef SPI_0_MODE
+#define SPI_0_MODE 0
+#endif
/* Configure pins */
#if SPI_SCK0_P0_6
lpc_ioconf.pio0_6 = ao_lpc_alternate(LPC_IOCONF_FUNC_PIO0_6_SCK0);
/* Configure pins */
#if SPI_SCK0_P0_6
lpc_ioconf.pio0_6 = ao_lpc_alternate(LPC_IOCONF_FUNC_PIO0_6_SCK0);
@@
-147,12
+149,15
@@
ao_spi_init(void)
lpc_scb.ssp0clkdiv = 1;
/* Reset the device */
lpc_scb.ssp0clkdiv = 1;
/* Reset the device */
- lpc_scb.presetctrl &= ~(1 << LPC_SCB_PRESETCTRL_SSP0_RST_N);
+ lpc_scb.presetctrl &= ~(1
UL
<< LPC_SCB_PRESETCTRL_SSP0_RST_N);
lpc_scb.presetctrl |= (1 << LPC_SCB_PRESETCTRL_SSP0_RST_N);
lpc_scb.presetctrl |= (1 << LPC_SCB_PRESETCTRL_SSP0_RST_N);
- ao_spi_channel_init(0);
+ ao_spi_channel_init(0
, SPI_0_MODE
);
#endif
#if HAS_SPI_1
#endif
#if HAS_SPI_1
+#ifndef SPI_1_MODE
+#define SPI_1_MODE 0
+#endif
#if SPI_SCK1_P1_15
lpc_ioconf.pio1_15 = ao_lpc_alternate(LPC_IOCONF_FUNC_PIO1_15_SCK1);
#if SPI_SCK1_P1_15
lpc_ioconf.pio1_15 = ao_lpc_alternate(LPC_IOCONF_FUNC_PIO1_15_SCK1);
@@
-197,8
+202,8
@@
ao_spi_init(void)
lpc_scb.ssp1clkdiv = 1;
/* Reset the device */
lpc_scb.ssp1clkdiv = 1;
/* Reset the device */
- lpc_scb.presetctrl &= ~(1 << LPC_SCB_PRESETCTRL_SSP1_RST_N);
+ lpc_scb.presetctrl &= ~(1
UL
<< LPC_SCB_PRESETCTRL_SSP1_RST_N);
lpc_scb.presetctrl |= (1 << LPC_SCB_PRESETCTRL_SSP1_RST_N);
lpc_scb.presetctrl |= (1 << LPC_SCB_PRESETCTRL_SSP1_RST_N);
- ao_spi_channel_init(1);
+ ao_spi_channel_init(1
, SPI_1_MODE
);
#endif /* HAS_SPI_1 */
}
#endif /* HAS_SPI_1 */
}