- CC1200_FIFO_CFG, 0x00, /* FIFO Configuration */
- CC1200_FS_CFG, 0x14, /* Frequency Synthesizer Configuration */
- CC1200_PKT_CFG2, 0x20, /* Packet Configuration Reg. 2 */
- CC1200_PKT_CFG1, 0xc3, /* Packet Configuration Reg. 1 */
- CC1200_PKT_CFG0, 0x20, /* Packet Configuration Reg. 0 */
+ CC1200_FIFO_CFG, 0x40, /* FIFO Configuration */
+ CC1200_SETTLING_CFG, /* Frequency Synthesizer Calibration and Settling Configuration */
+ ((CC1200_SETTLING_CFG_FS_AUTOCAL_EVERY_4TH_TIME << CC1200_SETTLING_CFG_FS_AUTOCAL) |
+ (CC1200_SETTLING_CFG_LOCK_TIME_75_30 << CC1200_SETTLING_CFG_LOCK_TIME) |
+ (CC1200_SETTLING_CFG_FSREG_TIME_60 << CC1200_SETTLING_CFG_FSREG_TIME)),
+ CC1200_FS_CFG, /* Frequency Synthesizer Configuration */
+ ((1 << CC1200_FS_CFG_LOCK_EN) |
+ (CC1200_FS_CFG_FSD_BANDSELECT_410_480 << CC1200_FS_CFG_FSD_BANDSELECT)),
+ CC1200_PKT_CFG2, /* Packet Configuration Reg. 2 */
+ ((0 << CC1200_PKT_CFG2_FG_MODE_EN) |
+ (CC1200_PKT_CFG2_CCA_MODE_ALWAYS_CLEAR << CC1200_PKT_CFG2_CCA_MODE) |
+ (CC1200_PKT_CFG2_PKT_FORMAT_NORMAL << CC1200_PKT_CFG2_PKT_FORMAT)),
+ CC1200_PKT_CFG1, /* Packet Configuration Reg. 1 */
+ ((1 << CC1200_PKT_CFG1_FEC_EN) |
+ (1 << CC1200_PKT_CFG1_WHITE_DATA) |
+ (0 << CC1200_PKT_CFG1_PN9_SWAP_EN) |
+ (CC1200_PKT_CFG1_ADDR_CHECK_CFG_NONE << CC1200_PKT_CFG1_ADDR_CHECK_CFG) |
+ (CC1200_PKT_CFG1_CRC_CFG_CRC16_INIT_ONES << CC1200_PKT_CFG1_CRC_CFG) |
+ (1 << CC1200_PKT_CFG1_APPEND_STATUS)),
+ CC1200_PKT_CFG0, /* Packet Configuration Reg. 0 */
+ ((CC1200_PKT_CFG0_LENGTH_CONFIG_FIXED << CC1200_PKT_CFG0_LENGTH_CONFIG) |
+ (0 << CC1200_PKT_CFG0_PKG_BIT_LEN) |
+ (0 << CC1200_PKT_CFG0_UART_MODE_EN) |
+ (0 << CC1200_PKT_CFG0_UART_SWAP_EN)),
+ CC1200_RFEND_CFG1, /* RFEND Configuration Reg. 1 */
+ ((CC1200_RFEND_CFG1_RXOFF_MODE_IDLE << CC1200_RFEND_CFG1_RXOFF_MODE) |
+ (CC1200_RFEND_CFG1_RX_TIME_INFINITE << CC1200_RFEND_CFG1_RX_TIME) |
+ (0 << CC1200_RFEND_CFG1_RX_TIME_QUAL)),
+ CC1200_RFEND_CFG0, /* RFEND Configuration Reg. 0 */
+ ((0 << CC1200_RFEND_CFG0_CAL_END_WAKE_UP_EN) |
+ (CC1200_RFEND_CFG0_TXOFF_MODE_IDLE << CC1200_RFEND_CFG0_TXOFF_MODE) |
+ (1 << CC1200_RFEND_CFG0_TERM_ON_BAD_PACKET_EN) |
+ (0 << CC1200_RFEND_CFG0_ANT_DIV_RX_TERM_CFG)),